From patchwork Thu Dec 13 18:01:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 10732965 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6558913BF for ; Mon, 17 Dec 2018 08:55:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5749029D32 for ; Mon, 17 Dec 2018 08:55:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4B7BB29D6C; Mon, 17 Dec 2018 08:55:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW,RDNS_NONE,SUSPICIOUS_RECIPS autolearn=no version=3.3.1 Received: from web01.groups.io (unknown [66.175.222.12]) (using TLSv1.2 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1A6C129D32 for ; Mon, 17 Dec 2018 08:55:15 +0000 (UTC) X-Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) by groups.io with SMTP; Thu, 13 Dec 2018 10:01:35 -0800 X-Received: from e0022681537dd.dyn.armlinux.org.uk ([2001:4d48:ad52:3201:222:68ff:fe15:37dd]:59210 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.90_1) (envelope-from ) id 1gXVIR-0003tC-I0; Thu, 13 Dec 2018 18:01:15 +0000 X-Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.82_1-5b7a7c0-XX) (envelope-from ) id 1gXVIO-0008Cn-DO; Thu, 13 Dec 2018 18:01:12 +0000 In-Reply-To: <20181213175952.GC26090@n2100.armlinux.org.uk> References: <20181213175952.GC26090@n2100.armlinux.org.uk> From: Russell King To: linux-arm-kernel@lists.infradead.org,linux-arm-msm@vger.kernel.org,linux-omap@vger.kernel.org,linux-oxnas@groups.io,linux-samsung-soc@vger.kernel.org,linux-soc@vger.kernel.org Cc: Linus Walleij ,Linus Walleij Subject: [linux-oxnas] [PATCH 7/9] ARM: versatile: convert boot_lock to raw MIME-Version: 1.0 Message-Id: Date: Thu, 13 Dec 2018 18:01:12 +0000 Precedence: Bulk List-Unsubscribe: Sender: linux-oxnas@groups.io List-Id: Mailing-List: list linux-oxnas@groups.io; contact linux-oxnas+owner@groups.io Delivered-To: mailing list linux-oxnas@groups.io Reply-To: linux-oxnas@groups.io,rmk+kernel@armlinux.org.uk Content-Disposition: inline DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1545036914; bh=8zofWZoSyC5ez/Dgap3ZTxDqhHeYSEDHKpHSaSi8r+k=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=LD7a5uLlYbFEa1ocv8mPVdq5bZAqycaw1KtPciNdukDG2blgcGLi69uD5XaXd5Olvdl tGMRFmSqSQajiPJ9oo7kgcnErRaeY8Ijb+9Zz/+MzDK9Q9VqHKjSNkEBi8RZDnO4tBwHg aFrKI2Cw9fN1M1bPnBQMQn8+tLPMgPLCxRs= X-Virus-Scanned: ClamAV using ClamSMTP From: Sebastian Andrzej Siewior The arm boot_lock is used by the secondary processor startup code. The locking task is the idle thread, which has idle->sched_class == &idle_sched_class. idle_sched_class->enqueue_task == NULL, so if the idle task blocks on the lock, the attempt to wake it when the lock becomes available will fail: try_to_wake_up() ... activate_task() enqueue_task() p->sched_class->enqueue_task(rq, p, flags) Fix by converting boot_lock to a raw spin lock. Cc: Linus Walleij Signed-off-by: Frank Rowand Link: http://lkml.kernel.org/r/4E77B952.3010606@am.sony.com Signed-off-by: Thomas Gleixner Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Russell King --- arch/arm/plat-versatile/platsmp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c index c2366510187a..6b60f582b738 100644 --- a/arch/arm/plat-versatile/platsmp.c +++ b/arch/arm/plat-versatile/platsmp.c @@ -32,7 +32,7 @@ static void write_pen_release(int val) sync_cache_w(&pen_release); } -static DEFINE_SPINLOCK(boot_lock); +static DEFINE_RAW_SPINLOCK(boot_lock); void versatile_secondary_init(unsigned int cpu) { @@ -45,8 +45,8 @@ void versatile_secondary_init(unsigned int cpu) /* * Synchronise with the boot thread. */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); + raw_spin_lock(&boot_lock); + raw_spin_unlock(&boot_lock); } int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) @@ -57,7 +57,7 @@ int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) * Set synchronisation state between this boot processor * and the secondary one */ - spin_lock(&boot_lock); + raw_spin_lock(&boot_lock); /* * This is really belt and braces; we hold unintended secondary @@ -87,7 +87,7 @@ int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) * now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ - spin_unlock(&boot_lock); + raw_spin_unlock(&boot_lock); return pen_release != -1 ? -ENOSYS : 0; }