diff mbox series

[v5] PCI: imx: make msi work without CONFIG_PCIEPORTBUS=y

Message ID 1545193599-11604-1-git-send-email-hongxing.zhu@nxp.com (mailing list archive)
State New, archived
Delegated to: Bjorn Helgaas
Headers show
Series [v5] PCI: imx: make msi work without CONFIG_PCIEPORTBUS=y | expand

Commit Message

Hongxing Zhu Dec. 19, 2018, 4:45 a.m. UTC 
Assertion of the MSI Enable bit of RC's MSI CAP is mandatory required to
trigger MSI on i.MX6 PCIe.
This bit would be asserted when CONFIG_PCIEPORTBUS=y.
Thus, the MSI works fine on i.MX6 PCIe before the commit "f3fdfc4".

Assert it unconditionally when MSI is enabled.
Otherwise, the MSI wouldn't be triggered although the EP is present and
the MSIs are assigned.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
Changes v1 -> v2:
* Assert the MSI_EN unconditionally when MSI is supported.
Changes v2 -> v3:
* Remove the IS_ENABLED(CONFIG_PCI_MSI) since the driver depends on
PCI_MSI_IRQ_DOMAIN
* Extended with a check for pci_msi_enabled() to see if the user
explicitly want legacy IRQs
Changes v3 -> v4:
* Refer to Bjorn's comments, refine the subject and commit log and change
the PCI_MSI_CAP to PCIE_RC_IMX6_MSI_CAP.
Changes v4 -> v5:
* Correct one spell mistake from PCIE_RC_MSI_IMX6_CAP to
PCIE_RC_IMX6_MSI_CAP.
---
 drivers/pci/controller/dwc/pci-imx6.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Sven Van Asbroeck Dec. 19, 2018, 3:07 p.m. UTC | #1 
This patch seems to fix the regression on my board: i.MX6 with a
tg3-based pcie NIC:
   CPU identified as i.MX6Q, silicon rev 1.5
   tg3 0000:03:00.0 eth0: Tigon3 [partno(BCM57780) rev 57780001] (PCI Express)

Tested-by: Sven Van Asbroeck <TheSven73@googlemail.com>

On Wed, Dec 19, 2018 at 12:25 AM Richard Zhu <hongxing.zhu@nxp.com> wrote:
>
> Assertion of the MSI Enable bit of RC's MSI CAP is mandatory required to
> trigger MSI on i.MX6 PCIe.
> This bit would be asserted when CONFIG_PCIEPORTBUS=y.
> Thus, the MSI works fine on i.MX6 PCIe before the commit "f3fdfc4".
>
> Assert it unconditionally when MSI is enabled.
> Otherwise, the MSI wouldn't be triggered although the EP is present and
> the MSIs are assigned.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> Changes v1 -> v2:
> * Assert the MSI_EN unconditionally when MSI is supported.
> Changes v2 -> v3:
> * Remove the IS_ENABLED(CONFIG_PCI_MSI) since the driver depends on
> PCI_MSI_IRQ_DOMAIN
> * Extended with a check for pci_msi_enabled() to see if the user
> explicitly want legacy IRQs
> Changes v3 -> v4:
> * Refer to Bjorn's comments, refine the subject and commit log and change
> the PCI_MSI_CAP to PCIE_RC_IMX6_MSI_CAP.
> Changes v4 -> v5:
> * Correct one spell mistake from PCIE_RC_MSI_IMX6_CAP to
> PCIE_RC_IMX6_MSI_CAP.
> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index e563ca9..73542dd 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -82,6 +82,7 @@ struct imx6_pcie {
>  #define PHY_PLL_LOCK_WAIT_USLEEP_MAX   200
>
>  /* PCIe Root Complex registers (memory-mapped) */
> +#define PCIE_RC_IMX6_MSI_CAP                   0x50
>  #define PCIE_RC_LCR                            0x7c
>  #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1       0x1
>  #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2       0x2
> @@ -999,6 +1000,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
>         struct resource *dbi_base;
>         struct device_node *node = dev->of_node;
>         int ret;
> +       u16 val;
>
>         imx6_pcie = devm_kzalloc(dev, sizeof(*imx6_pcie), GFP_KERNEL);
>         if (!imx6_pcie)
> @@ -1149,6 +1151,14 @@ static int imx6_pcie_probe(struct platform_device *pdev)
>         if (ret < 0)
>                 return ret;
>
> +       if (pci_msi_enabled()) {
> +               val = dw_pcie_readw_dbi(pci, PCIE_RC_IMX6_MSI_CAP +
> +                               PCI_MSI_FLAGS);
> +               val |= PCI_MSI_FLAGS_ENABLE;
> +               dw_pcie_writew_dbi(pci, PCIE_RC_IMX6_MSI_CAP +
> +                               PCI_MSI_FLAGS, val);
> +       }
> +
>         return 0;
>  }
>
> --
> 2.7.4
>
Lorenzo Pieralisi Dec. 20, 2018, 2:49 p.m. UTC | #2 
On Wed, Dec 19, 2018 at 04:45:04AM +0000, Richard Zhu wrote:
> Assertion of the MSI Enable bit of RC's MSI CAP is mandatory required to
> trigger MSI on i.MX6 PCIe.
> This bit would be asserted when CONFIG_PCIEPORTBUS=y.
> Thus, the MSI works fine on i.MX6 PCIe before the commit "f3fdfc4".
> 
> Assert it unconditionally when MSI is enabled.
> Otherwise, the MSI wouldn't be triggered although the EP is present and
> the MSIs are assigned.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> Changes v1 -> v2:
> * Assert the MSI_EN unconditionally when MSI is supported.
> Changes v2 -> v3:
> * Remove the IS_ENABLED(CONFIG_PCI_MSI) since the driver depends on
> PCI_MSI_IRQ_DOMAIN
> * Extended with a check for pci_msi_enabled() to see if the user
> explicitly want legacy IRQs
> Changes v3 -> v4:
> * Refer to Bjorn's comments, refine the subject and commit log and change
> the PCI_MSI_CAP to PCIE_RC_IMX6_MSI_CAP.
> Changes v4 -> v5:
> * Correct one spell mistake from PCIE_RC_MSI_IMX6_CAP to
> PCIE_RC_IMX6_MSI_CAP.
> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index e563ca9..73542dd 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -82,6 +82,7 @@ struct imx6_pcie {
>  #define PHY_PLL_LOCK_WAIT_USLEEP_MAX	200
>  
>  /* PCIe Root Complex registers (memory-mapped) */
> +#define PCIE_RC_IMX6_MSI_CAP			0x50
>  #define PCIE_RC_LCR				0x7c
>  #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1	0x1
>  #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2	0x2
> @@ -999,6 +1000,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
>  	struct resource *dbi_base;
>  	struct device_node *node = dev->of_node;
>  	int ret;
> +	u16 val;
>  
>  	imx6_pcie = devm_kzalloc(dev, sizeof(*imx6_pcie), GFP_KERNEL);
>  	if (!imx6_pcie)
> @@ -1149,6 +1151,14 @@ static int imx6_pcie_probe(struct platform_device *pdev)
>  	if (ret < 0)
>  		return ret;
>  
> +	if (pci_msi_enabled()) {
> +		val = dw_pcie_readw_dbi(pci, PCIE_RC_IMX6_MSI_CAP +
> +				PCI_MSI_FLAGS);
> +		val |= PCI_MSI_FLAGS_ENABLE;
> +		dw_pcie_writew_dbi(pci, PCIE_RC_IMX6_MSI_CAP +
> +				PCI_MSI_FLAGS, val);
> +	}
> +
>  	return 0;
>  }

Hi Richard,

the patch is OK with me (even though I have to take for granted how the
IMX MSI logic works), the commit log isn't. So please update it with
Bjorn's version:

https://lore.kernel.org/linux-pci/20181219141241.GB12763@google.com/

*inclusive* of the Fixes: tag.

With the commit log updated as per the link above:

Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Hongxing Zhu Dec. 21, 2018, 12:42 a.m. UTC | #3 
Hi Lorenzo:

> -----Original Message-----
> From: Lorenzo Pieralisi [mailto:lorenzo.pieralisi@arm.com]
> Sent: 2018年12月20日 22:50
> To: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: bhelgaas@google.com; l.stach@pengutronix.de;
> andrew.smirnov@gmail.com; linux-pci@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: Re: [v5] PCI: imx: make msi work without CONFIG_PCIEPORTBUS=y
> 
> On Wed, Dec 19, 2018 at 04:45:04AM +0000, Richard Zhu wrote:
> > Assertion of the MSI Enable bit of RC's MSI CAP is mandatory required
> > to trigger MSI on i.MX6 PCIe.
> > This bit would be asserted when CONFIG_PCIEPORTBUS=y.
> > Thus, the MSI works fine on i.MX6 PCIe before the commit "f3fdfc4".
> >
> > Assert it unconditionally when MSI is enabled.
> > Otherwise, the MSI wouldn't be triggered although the EP is present
> > and the MSIs are assigned.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> > ---
> > Changes v1 -> v2:
> > * Assert the MSI_EN unconditionally when MSI is supported.
> > Changes v2 -> v3:
> > * Remove the IS_ENABLED(CONFIG_PCI_MSI) since the driver depends on
> > PCI_MSI_IRQ_DOMAIN
> > * Extended with a check for pci_msi_enabled() to see if the user
> > explicitly want legacy IRQs Changes v3 -> v4:
> > * Refer to Bjorn's comments, refine the subject and commit log and
> > change the PCI_MSI_CAP to PCIE_RC_IMX6_MSI_CAP.
> > Changes v4 -> v5:
> > * Correct one spell mistake from PCIE_RC_MSI_IMX6_CAP to
> > PCIE_RC_IMX6_MSI_CAP.
> > ---
> >  drivers/pci/controller/dwc/pci-imx6.c | 10 ++++++++++
> >  1 file changed, 10 insertions(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> > b/drivers/pci/controller/dwc/pci-imx6.c
> > index e563ca9..73542dd 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -82,6 +82,7 @@ struct imx6_pcie {
> >  #define PHY_PLL_LOCK_WAIT_USLEEP_MAX	200
> >
> >  /* PCIe Root Complex registers (memory-mapped) */
> > +#define PCIE_RC_IMX6_MSI_CAP			0x50
> >  #define PCIE_RC_LCR				0x7c
> >  #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1	0x1
> >  #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2	0x2
> > @@ -999,6 +1000,7 @@ static int imx6_pcie_probe(struct platform_device
> *pdev)
> >  	struct resource *dbi_base;
> >  	struct device_node *node = dev->of_node;
> >  	int ret;
> > +	u16 val;
> >
> >  	imx6_pcie = devm_kzalloc(dev, sizeof(*imx6_pcie), GFP_KERNEL);
> >  	if (!imx6_pcie)
> > @@ -1149,6 +1151,14 @@ static int imx6_pcie_probe(struct
> platform_device *pdev)
> >  	if (ret < 0)
> >  		return ret;
> >
> > +	if (pci_msi_enabled()) {
> > +		val = dw_pcie_readw_dbi(pci, PCIE_RC_IMX6_MSI_CAP +
> > +				PCI_MSI_FLAGS);
> > +		val |= PCI_MSI_FLAGS_ENABLE;
> > +		dw_pcie_writew_dbi(pci, PCIE_RC_IMX6_MSI_CAP +
> > +				PCI_MSI_FLAGS, val);
> > +	}
> > +
> >  	return 0;
> >  }
> 
> Hi Richard,
> 
> the patch is OK with me (even though I have to take for granted how the IMX
> MSI logic works), the commit log isn't. So please update it with Bjorn's version:
> 
> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.
> kernel.org%2Flinux-pci%2F20181219141241.GB12763%40google.com%2F&a
> mp;data=02%7C01%7Chongxing.zhu%40nxp.com%7C8d4c31272e9f41298ea
> 908d6668a6f47%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63
> 6809142093459437&amp;sdata=fKpSC2L8TpC217ef4uXLX%2FylvnrCwp38Ug
> n8bMWvjO8%3D&amp;reserved=0
> 
> *inclusive* of the Fixes: tag.
> 
> With the commit log updated as per the link above:
> 
> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
[Richard Zhu] Thanks. I would send out next version with Bjorn's commits later.
diff mbox series

Patch

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index e563ca9..73542dd 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -82,6 +82,7 @@  struct imx6_pcie {
 #define PHY_PLL_LOCK_WAIT_USLEEP_MAX	200
 
 /* PCIe Root Complex registers (memory-mapped) */
+#define PCIE_RC_IMX6_MSI_CAP			0x50
 #define PCIE_RC_LCR				0x7c
 #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1	0x1
 #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2	0x2
@@ -999,6 +1000,7 @@  static int imx6_pcie_probe(struct platform_device *pdev)
 	struct resource *dbi_base;
 	struct device_node *node = dev->of_node;
 	int ret;
+	u16 val;
 
 	imx6_pcie = devm_kzalloc(dev, sizeof(*imx6_pcie), GFP_KERNEL);
 	if (!imx6_pcie)
@@ -1149,6 +1151,14 @@  static int imx6_pcie_probe(struct platform_device *pdev)
 	if (ret < 0)
 		return ret;
 
+	if (pci_msi_enabled()) {
+		val = dw_pcie_readw_dbi(pci, PCIE_RC_IMX6_MSI_CAP +
+				PCI_MSI_FLAGS);
+		val |= PCI_MSI_FLAGS_ENABLE;
+		dw_pcie_writew_dbi(pci, PCIE_RC_IMX6_MSI_CAP +
+				PCI_MSI_FLAGS, val);
+	}
+
 	return 0;
 }