| Message ID | 1545365708-13086-1-git-send-email-hongxing.zhu@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
| Series | [v6] PCI: imx: make msi work without CONFIG_PCIEPORTBUS=y | expand |
On Fri, 2018-12-21 at 04:33 +0000, Richard Zhu wrote: > The MSI Enable bit in the MSI Capability (PCIe r4.0, sec 7.7.1.2) > controls whether a Function can request service using MSI. > > i.MX6 Root Ports implement the MSI Capability and may use MSI to > request service for events like PME, hotplug, AER, etc. In > addition, on i.MX6, the MSI Enable bit controls delivery of MSI > interrupts from components below the Root Port. > > Prior to commit f3fdfc4ac3a2 ("PCI: Remove host driver Kconfig > selection > of CONFIG_PCIEPORTBUS"), enabling CONFIG_PCI_IMX6 automatically also > enabled CONFIG_PCIEPORTBUS, and when portdrv claimed the Root Ports, > it set the MSI Enable bit so it could use PME, hotplug, AER, etc. > As a side effect, that also enabled delivery of MSI interrupts from > downstream components. > > After f3fdfc4ac3a2, the imx6q-pcie driver can operate without > portdrv, but that means imx6q-pcie must set the MSI Enable bit > itself if downstream components use MSI. > > Fixes: f3fdfc4ac3a2 ("PCI: Remove host driver Kconfig selection of > CONFIG_PCIEPORTBUS") > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > Tested-by: Sven Van Asbroeck <TheSven73@googlemail.com> > Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested on IMX7d, allows MSI to work without enabling PCIEPORTBUS, which fails without this patch.
On Fri, Dec 21, 2018 at 04:33:38AM +0000, Richard Zhu wrote: > The MSI Enable bit in the MSI Capability (PCIe r4.0, sec 7.7.1.2) > controls whether a Function can request service using MSI. > > i.MX6 Root Ports implement the MSI Capability and may use MSI to > request service for events like PME, hotplug, AER, etc. In > addition, on i.MX6, the MSI Enable bit controls delivery of MSI > interrupts from components below the Root Port. > > Prior to commit f3fdfc4ac3a2 ("PCI: Remove host driver Kconfig selection > of CONFIG_PCIEPORTBUS"), enabling CONFIG_PCI_IMX6 automatically also > enabled CONFIG_PCIEPORTBUS, and when portdrv claimed the Root Ports, > it set the MSI Enable bit so it could use PME, hotplug, AER, etc. > As a side effect, that also enabled delivery of MSI interrupts from > downstream components. > > After f3fdfc4ac3a2, the imx6q-pcie driver can operate without > portdrv, but that means imx6q-pcie must set the MSI Enable bit > itself if downstream components use MSI. > > Fixes: f3fdfc4ac3a2 ("PCI: Remove host driver Kconfig selection of CONFIG_PCIEPORTBUS") > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > Tested-by: Sven Van Asbroeck <TheSven73@googlemail.com> > Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Applied with Trent's tested-by to pci/imx6 for v4.21. > --- > Changes v1 -> v2: > * Assert the MSI_EN unconditionally when MSI is supported. > Changes v2 -> v3: > * Remove the IS_ENABLED(CONFIG_PCI_MSI) since the driver depends on > PCI_MSI_IRQ_DOMAIN > * Extended with a check for pci_msi_enabled() to see if the user > explicitly want legacy IRQs > Changes v3 -> v4: > * Refer to Bjorn's comments, refine the subject and commit log and change > the PCI_MSI_CAP to PCIE_RC_IMX6_MSI_CAP. > Changes v4 -> v5: > * Correct one spell mistake from PCIE_RC_MSI_IMX6_CAP to > PCIE_RC_IMX6_MSI_CAP. > Changes v5 -> v6: > * Update with Bjorn's commit. > * One "commit" added in "Prior to f3fdfc4ac3a2" refer to the complain of > checkpatch.pl. > --- > drivers/pci/controller/dwc/pci-imx6.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index e563ca9..73542dd 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -82,6 +82,7 @@ struct imx6_pcie { > #define PHY_PLL_LOCK_WAIT_USLEEP_MAX 200 > > /* PCIe Root Complex registers (memory-mapped) */ > +#define PCIE_RC_IMX6_MSI_CAP 0x50 > #define PCIE_RC_LCR 0x7c > #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1 0x1 > #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2 0x2 > @@ -999,6 +1000,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) > struct resource *dbi_base; > struct device_node *node = dev->of_node; > int ret; > + u16 val; > > imx6_pcie = devm_kzalloc(dev, sizeof(*imx6_pcie), GFP_KERNEL); > if (!imx6_pcie) > @@ -1149,6 +1151,14 @@ static int imx6_pcie_probe(struct platform_device *pdev) > if (ret < 0) > return ret; > > + if (pci_msi_enabled()) { > + val = dw_pcie_readw_dbi(pci, PCIE_RC_IMX6_MSI_CAP + > + PCI_MSI_FLAGS); > + val |= PCI_MSI_FLAGS_ENABLE; > + dw_pcie_writew_dbi(pci, PCIE_RC_IMX6_MSI_CAP + > + PCI_MSI_FLAGS, val); > + } > + > return 0; > } > > -- > 2.7.4 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index e563ca9..73542dd 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -82,6 +82,7 @@ struct imx6_pcie { #define PHY_PLL_LOCK_WAIT_USLEEP_MAX 200 /* PCIe Root Complex registers (memory-mapped) */ +#define PCIE_RC_IMX6_MSI_CAP 0x50 #define PCIE_RC_LCR 0x7c #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1 0x1 #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2 0x2 @@ -999,6 +1000,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) struct resource *dbi_base; struct device_node *node = dev->of_node; int ret; + u16 val; imx6_pcie = devm_kzalloc(dev, sizeof(*imx6_pcie), GFP_KERNEL); if (!imx6_pcie) @@ -1149,6 +1151,14 @@ static int imx6_pcie_probe(struct platform_device *pdev) if (ret < 0) return ret; + if (pci_msi_enabled()) { + val = dw_pcie_readw_dbi(pci, PCIE_RC_IMX6_MSI_CAP + + PCI_MSI_FLAGS); + val |= PCI_MSI_FLAGS_ENABLE; + dw_pcie_writew_dbi(pci, PCIE_RC_IMX6_MSI_CAP + + PCI_MSI_FLAGS, val); + } + return 0; }
The MSI Enable bit in the MSI Capability (PCIe r4.0, sec 7.7.1.2) controls whether a Function can request service using MSI. i.MX6 Root Ports implement the MSI Capability and may use MSI to request service for events like PME, hotplug, AER, etc. In addition, on i.MX6, the MSI Enable bit controls delivery of MSI interrupts from components below the Root Port. Prior to commit f3fdfc4ac3a2 ("PCI: Remove host driver Kconfig selection of CONFIG_PCIEPORTBUS"), enabling CONFIG_PCI_IMX6 automatically also enabled CONFIG_PCIEPORTBUS, and when portdrv claimed the Root Ports, it set the MSI Enable bit so it could use PME, hotplug, AER, etc. As a side effect, that also enabled delivery of MSI interrupts from downstream components. After f3fdfc4ac3a2, the imx6q-pcie driver can operate without portdrv, but that means imx6q-pcie must set the MSI Enable bit itself if downstream components use MSI. Fixes: f3fdfc4ac3a2 ("PCI: Remove host driver Kconfig selection of CONFIG_PCIEPORTBUS") Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Sven Van Asbroeck <TheSven73@googlemail.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> --- Changes v1 -> v2: * Assert the MSI_EN unconditionally when MSI is supported. Changes v2 -> v3: * Remove the IS_ENABLED(CONFIG_PCI_MSI) since the driver depends on PCI_MSI_IRQ_DOMAIN * Extended with a check for pci_msi_enabled() to see if the user explicitly want legacy IRQs Changes v3 -> v4: * Refer to Bjorn's comments, refine the subject and commit log and change the PCI_MSI_CAP to PCIE_RC_IMX6_MSI_CAP. Changes v4 -> v5: * Correct one spell mistake from PCIE_RC_MSI_IMX6_CAP to PCIE_RC_IMX6_MSI_CAP. Changes v5 -> v6: * Update with Bjorn's commit. * One "commit" added in "Prior to f3fdfc4ac3a2" refer to the complain of checkpatch.pl. --- drivers/pci/controller/dwc/pci-imx6.c | 10 ++++++++++ 1 file changed, 10 insertions(+)