[v2,1/7] dt-bindings: soc: qcom: Add AOSS QMP binding
diff mbox series

Message ID 20190106080915.4493-2-bjorn.andersson@linaro.org
State Not Applicable, archived
Delegated to: Andy Gross
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Series
  • Qualcomm AOSS QMP side channel binding and driver
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Commit Message

Bjorn Andersson Jan. 6, 2019, 8:09 a.m. UTC
Add binding for the QMP based side-channel communication mechanism to
the AOSS, which is used to control resources not exposed through the
RPMh interface.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---

Changes since v1:
- Don't describe power-domain as a separate child node

 .../bindings/soc/qcom/qcom,aoss-qmp.txt       | 57 +++++++++++++++++++
 include/dt-bindings/power/qcom-aoss-qmp.h     | 15 +++++
 2 files changed, 72 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
 create mode 100644 include/dt-bindings/power/qcom-aoss-qmp.h

Comments

Rob Herring Jan. 11, 2019, 10:10 p.m. UTC | #1
On Sun,  6 Jan 2019 00:09:09 -0800, Bjorn Andersson wrote:
> Add binding for the QMP based side-channel communication mechanism to
> the AOSS, which is used to control resources not exposed through the
> RPMh interface.
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
> 
> Changes since v1:
> - Don't describe power-domain as a separate child node
> 
>  .../bindings/soc/qcom/qcom,aoss-qmp.txt       | 57 +++++++++++++++++++
>  include/dt-bindings/power/qcom-aoss-qmp.h     | 15 +++++
>  2 files changed, 72 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
>  create mode 100644 include/dt-bindings/power/qcom-aoss-qmp.h
> 

Reviewed-by: Rob Herring <robh@kernel.org>
Stephen Boyd Jan. 14, 2019, 10:30 p.m. UTC | #2
Quoting Bjorn Andersson (2019-01-06 00:09:09)
> Add binding for the QMP based side-channel communication mechanism to
> the AOSS, which is used to control resources not exposed through the
> RPMh interface.
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Reviewed-by: Stephen Boyd <swboyd@chromium.org>

one nit below.

> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
> new file mode 100644
> index 000000000000..9b0d9785efe0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
> @@ -0,0 +1,57 @@
> += EXAMPLE
> +
> +The following example represents the AOSS side-channel message RAM and the
> +mechanism exposing the power-domains, as found in SDM845.
> +
> +  aoss_qmp: qmp@c300000 {
> +          compatible = "qcom,sdm845-aoss-qmp";
> +          reg = <0x0c300000 0x100000>;
> +          interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
> +          mboxes = <&apss_shared 0>;
> +
> +         #power-domain-cells = <1>;

This is weirdly tabbed out.

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
new file mode 100644
index 000000000000..9b0d9785efe0
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
@@ -0,0 +1,57 @@ 
+Qualcomm Always-On Subsystem side channel binding
+
+This binding describes the hardware component responsible for side channel
+requests to the always-on subsystem (AOSS), used for certain power management
+requests that is not handled by the standard RPMh interface. Each client in the
+SoC has it's own block of message RAM and IRQ for communication with the AOSS.
+The protocol used to communicate in the message RAM is known as QMP.
+
+The AOSS side channel exposes control over a set of resources, used to control
+a set of debug related clocks and to affect the low power state of resources
+related to the secondary subsystems. These resources are exposed as a set of
+power-domains.
+
+- compatible:
+	Usage: required
+	Value type: <string>
+	Definition: must be "qcom,sdm845-aoss-qmp"
+
+- reg:
+	Usage: required
+	Value type: <prop-encoded-array>
+	Definition: the base address and size of the message RAM for this
+		    client's communication with the AOSS
+
+- interrupts:
+	Usage: required
+	Value type: <prop-encoded-array>
+	Definition: should specify the AOSS message IRQ for this client
+
+- mboxes:
+	Usage: required
+	Value type: <prop-encoded-array>
+	Definition: reference to the mailbox representing the outgoing doorbell
+		    in APCS for this client, as described in mailbox/mailbox.txt
+
+- #power-domain-cells:
+	Usage: optional
+	Value type: <u32>
+	Definition: must be 1
+		    The provided power-domains are:
+		    QDSS clock-domain (0), CDSP state (1), LPASS state (2),
+		    modem state (3), SLPI state (4), SPSS state (5) and Venus
+		    state (6).
+
+= EXAMPLE
+
+The following example represents the AOSS side-channel message RAM and the
+mechanism exposing the power-domains, as found in SDM845.
+
+  aoss_qmp: qmp@c300000 {
+          compatible = "qcom,sdm845-aoss-qmp";
+          reg = <0x0c300000 0x100000>;
+          interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
+          mboxes = <&apss_shared 0>;
+
+	  #power-domain-cells = <1>;
+  };
diff --git a/include/dt-bindings/power/qcom-aoss-qmp.h b/include/dt-bindings/power/qcom-aoss-qmp.h
new file mode 100644
index 000000000000..7d8ac1a4f90c
--- /dev/null
+++ b/include/dt-bindings/power/qcom-aoss-qmp.h
@@ -0,0 +1,15 @@ 
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2018, Linaro Ltd. */
+
+#ifndef __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H
+#define __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H
+
+#define AOSS_QMP_QDSS_CLK	0
+#define AOSS_QMP_LS_CDSP		1
+#define AOSS_QMP_LS_LPASS	2
+#define AOSS_QMP_LS_MODEM	3
+#define AOSS_QMP_LS_SLPI		4
+#define AOSS_QMP_LS_SPSS		5
+#define AOSS_QMP_LS_VENUS	6
+
+#endif