| Message ID | 1546933053-10731-7-git-send-email-uma.shankar@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for Gen 11 pipe color features | expand |
On Tue, Jan 08, 2019 at 01:07:33PM +0530, Uma Shankar wrote: > Add the degamma and gamma lut sizes to gen11 capability > structure. > > Note: Currently this doesn't account for the extended range gamma > entries and this will be addressed with new segmented gamma ABI > in a future patch. > > v2: Reorder the patch as per Maarten's suggestion. > > v3: Rebase > > v4: Updated commit message with a note as per Matt's suggestion. > > v5: No Change. > > Signed-off-by: Uma Shankar <uma.shankar@intel.com> On one of the earlier patches, we suggested using the new degamma loading function for glk/cnl as well. If you do that, you'll also probably want to update the degamma_lut_size for GLK as well, although that can be done as a separate patch if you like. The values here look correct for ICL, so Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/i915_pci.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index dd4aff2..14e5bb4 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -639,7 +639,8 @@ > }, \ > GEN(11), \ > .ddb_size = 2048, \ > - .has_logical_ring_elsq = 1 > + .has_logical_ring_elsq = 1, \ > + .color = { .degamma_lut_size = 33, .gamma_lut_size = 1024 } > > static const struct intel_device_info intel_icelake_11_info = { > GEN11_FEATURES, > -- > 1.9.1 >
>-----Original Message----- >From: Roper, Matthew D >Sent: Saturday, January 12, 2019 4:35 AM >To: Shankar, Uma <uma.shankar@intel.com> >Cc: intel-gfx@lists.freedesktop.org; Lankhorst, Maarten ><maarten.lankhorst@intel.com>; Syrjala, Ville <ville.syrjala@intel.com>; Sharma, >Shashank <shashank.sharma@intel.com> >Subject: Re: [v5 6/6] drm/i915/icl: Add degamma and gamma lut size to gen11 >caps > >On Tue, Jan 08, 2019 at 01:07:33PM +0530, Uma Shankar wrote: >> Add the degamma and gamma lut sizes to gen11 capability structure. >> >> Note: Currently this doesn't account for the extended range gamma >> entries and this will be addressed with new segmented gamma ABI in a >> future patch. >> >> v2: Reorder the patch as per Maarten's suggestion. >> >> v3: Rebase >> >> v4: Updated commit message with a note as per Matt's suggestion. >> >> v5: No Change. >> >> Signed-off-by: Uma Shankar <uma.shankar@intel.com> > >On one of the earlier patches, we suggested using the new degamma loading >function for glk/cnl as well. If you do that, you'll also probably want to update >the degamma_lut_size for GLK as well, although that can be done as a separate >patch if you like. I have updated GLK degamma to handle this correctly and ICL to re-use that. > >The values here look correct for ICL, so > >Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Thanks Matt for the review and all the valuable corrections and inputs. Regards, Uma Shankar >> --- >> drivers/gpu/drm/i915/i915_pci.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_pci.c >> b/drivers/gpu/drm/i915/i915_pci.c index dd4aff2..14e5bb4 100644 >> --- a/drivers/gpu/drm/i915/i915_pci.c >> +++ b/drivers/gpu/drm/i915/i915_pci.c >> @@ -639,7 +639,8 @@ >> }, \ >> GEN(11), \ >> .ddb_size = 2048, \ >> - .has_logical_ring_elsq = 1 >> + .has_logical_ring_elsq = 1, \ >> + .color = { .degamma_lut_size = 33, .gamma_lut_size = 1024 } >> >> static const struct intel_device_info intel_icelake_11_info = { >> GEN11_FEATURES, >> -- >> 1.9.1 >> > >-- >Matt Roper >Graphics Software Engineer >IoTG Platform Enabling & Development >Intel Corporation >(916) 356-2795
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index dd4aff2..14e5bb4 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -639,7 +639,8 @@ }, \ GEN(11), \ .ddb_size = 2048, \ - .has_logical_ring_elsq = 1 + .has_logical_ring_elsq = 1, \ + .color = { .degamma_lut_size = 33, .gamma_lut_size = 1024 } static const struct intel_device_info intel_icelake_11_info = { GEN11_FEATURES,
Add the degamma and gamma lut sizes to gen11 capability structure. Note: Currently this doesn't account for the extended range gamma entries and this will be addressed with new segmented gamma ABI in a future patch. v2: Reorder the patch as per Maarten's suggestion. v3: Rebase v4: Updated commit message with a note as per Matt's suggestion. v5: No Change. Signed-off-by: Uma Shankar <uma.shankar@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)