| Message ID | 20190111170823.4441-13-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Enable/disable gamma/csc dynamically and fix C8 | expand |
>-----Original Message----- >From: Ville Syrjala [mailto:ville.syrjala@linux.intel.com] >Sent: Friday, January 11, 2019 10:38 PM >To: intel-gfx@lists.freedesktop.org >Cc: Shankar, Uma <uma.shankar@intel.com>; Roper, Matthew D ><matthew.d.roper@intel.com> >Subject: [PATCH 12/13] drm/i915: Turn off pipe CSC when it's not needed > >From: Ville Syrjälä <ville.syrjala@linux.intel.com> > >As with pipe gamma we can avoid the potential precision loss from the pipe csc >unit when there is no need to use it. And again we need the same logic for >updating the planes. Looks ok to me. Reviewed-by: Uma Shankar <uma.shankar@intel.com> >Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> >--- > drivers/gpu/drm/i915/intel_color.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > >diff --git a/drivers/gpu/drm/i915/intel_color.c >b/drivers/gpu/drm/i915/intel_color.c >index a8b7428a64bf..789b04bb51d2 100644 >--- a/drivers/gpu/drm/i915/intel_color.c >+++ b/drivers/gpu/drm/i915/intel_color.c >@@ -659,7 +659,8 @@ intel_color_add_affected_planes(struct intel_crtc_state >*new_crtc_state) > intel_atomic_get_old_crtc_state(state, crtc); > struct intel_plane *plane; > >- if (new_crtc_state->gamma_enable == old_crtc_state->gamma_enable) >+ if (new_crtc_state->gamma_enable == old_crtc_state->gamma_enable >&& >+ new_crtc_state->csc_enable == old_crtc_state->csc_enable) > return 0; > > for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { @@ -684,6 >+685,7 @@ int intel_color_check(struct intel_crtc_state *crtc_state) > const struct drm_property_blob *gamma_lut = crtc_state- >>base.gamma_lut; > const struct drm_property_blob *degamma_lut = crtc_state- >>base.degamma_lut; > size_t gamma_length, degamma_length; >+ bool limited_color_range = false; > int ret; > > degamma_length = INTEL_INFO(dev_priv)->color.degamma_lut_size; >@@ -693,7 +695,11 @@ int intel_color_check(struct intel_crtc_state >*crtc_state) > > if (INTEL_GEN(dev_priv) >= 9 || > IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) >- crtc_state->csc_enable = true; >+ limited_color_range = crtc_state->limited_color_range; >+ >+ crtc_state->csc_enable = >+ crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB || >+ crtc_state->base.ctm || limited_color_range; > > ret = intel_color_add_affected_planes(crtc_state); > if (ret) >-- >2.19.2
On Fri, Jan 11, 2019 at 07:08:22PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > As with pipe gamma we can avoid the potential precision loss from > the pipe csc unit when there is no need to use it. And again > we need the same logic for updating the planes. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/intel_color.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c > index a8b7428a64bf..789b04bb51d2 100644 > --- a/drivers/gpu/drm/i915/intel_color.c > +++ b/drivers/gpu/drm/i915/intel_color.c > @@ -659,7 +659,8 @@ intel_color_add_affected_planes(struct intel_crtc_state *new_crtc_state) > intel_atomic_get_old_crtc_state(state, crtc); > struct intel_plane *plane; > > - if (new_crtc_state->gamma_enable == old_crtc_state->gamma_enable) > + if (new_crtc_state->gamma_enable == old_crtc_state->gamma_enable && > + new_crtc_state->csc_enable == old_crtc_state->csc_enable) > return 0; > > for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { > @@ -684,6 +685,7 @@ int intel_color_check(struct intel_crtc_state *crtc_state) > const struct drm_property_blob *gamma_lut = crtc_state->base.gamma_lut; > const struct drm_property_blob *degamma_lut = crtc_state->base.degamma_lut; > size_t gamma_length, degamma_length; > + bool limited_color_range = false; > int ret; > > degamma_length = INTEL_INFO(dev_priv)->color.degamma_lut_size; > @@ -693,7 +695,11 @@ int intel_color_check(struct intel_crtc_state *crtc_state) > > if (INTEL_GEN(dev_priv) >= 9 || > IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) > - crtc_state->csc_enable = true; > + limited_color_range = crtc_state->limited_color_range; > + > + crtc_state->csc_enable = > + crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB || > + crtc_state->base.ctm || limited_color_range; > > ret = intel_color_add_affected_planes(crtc_state); > if (ret) > -- > 2.19.2 >
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c index a8b7428a64bf..789b04bb51d2 100644 --- a/drivers/gpu/drm/i915/intel_color.c +++ b/drivers/gpu/drm/i915/intel_color.c @@ -659,7 +659,8 @@ intel_color_add_affected_planes(struct intel_crtc_state *new_crtc_state) intel_atomic_get_old_crtc_state(state, crtc); struct intel_plane *plane; - if (new_crtc_state->gamma_enable == old_crtc_state->gamma_enable) + if (new_crtc_state->gamma_enable == old_crtc_state->gamma_enable && + new_crtc_state->csc_enable == old_crtc_state->csc_enable) return 0; for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { @@ -684,6 +685,7 @@ int intel_color_check(struct intel_crtc_state *crtc_state) const struct drm_property_blob *gamma_lut = crtc_state->base.gamma_lut; const struct drm_property_blob *degamma_lut = crtc_state->base.degamma_lut; size_t gamma_length, degamma_length; + bool limited_color_range = false; int ret; degamma_length = INTEL_INFO(dev_priv)->color.degamma_lut_size; @@ -693,7 +695,11 @@ int intel_color_check(struct intel_crtc_state *crtc_state) if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) - crtc_state->csc_enable = true; + limited_color_range = crtc_state->limited_color_range; + + crtc_state->csc_enable = + crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB || + crtc_state->base.ctm || limited_color_range; ret = intel_color_add_affected_planes(crtc_state); if (ret)