From patchwork Tue Jan 15 17:14:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Krish Sadhukhan X-Patchwork-Id: 10764897 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0AB8B13B4 for ; Tue, 15 Jan 2019 17:39:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EE96A2D427 for ; Tue, 15 Jan 2019 17:39:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E241C2D493; Tue, 15 Jan 2019 17:39:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6A9B52D427 for ; Tue, 15 Jan 2019 17:39:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388479AbfAORjh (ORCPT ); Tue, 15 Jan 2019 12:39:37 -0500 Received: from aserp2130.oracle.com ([141.146.126.79]:55676 "EHLO aserp2130.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729035AbfAORjh (ORCPT ); Tue, 15 Jan 2019 12:39:37 -0500 Received: from pps.filterd (aserp2130.oracle.com [127.0.0.1]) by aserp2130.oracle.com (8.16.0.22/8.16.0.22) with SMTP id x0FHY6rs029270; Tue, 15 Jan 2019 17:39:31 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : mime-version : content-type : content-transfer-encoding; s=corp-2018-07-02; bh=orxC1oW4GrM/ki20cNOkdvrNA9HcWo0zJ/VH5ehB0J0=; b=z1B8+92ZGPva0HVk657EeocShbakf68L1BFkfTCONlV9bUv0wjAoWzxd5PlUKp4HnsR/ JsH4et6zWMNdoizW+oEh913V1zEikDQyqZlX5aIhbNVcuifOHmJ0Y6IKdhu2fesKot1u 4CkrL/0J6BxYm1J7S2a0NG9N03yH2xE5vbV8K3ByfrDRJ4W9/hjZgE7ZGBmzWXcemu4z nSaeTZ3lPxqG9oOBfeXfgU48A/LM5D6BzLX3/zR9TA15yx0SRi1ekwFHHRxkqOx/Iqsd uN8jYMdwMYaw4E6W1fWWmcY+DYPw5+7hz4fHuUiPvATxqIf19upOs3o1I/Qc8wu7Frlk gQ== Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by aserp2130.oracle.com with ESMTP id 2pybjnnack-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 15 Jan 2019 17:39:31 +0000 Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by aserv0021.oracle.com (8.14.4/8.14.4) with ESMTP id x0FHdVnC027230 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 15 Jan 2019 17:39:31 GMT Received: from abhmp0008.oracle.com (abhmp0008.oracle.com [141.146.116.14]) by aserv0122.oracle.com (8.14.4/8.14.4) with ESMTP id x0FHdVYn008480; Tue, 15 Jan 2019 17:39:31 GMT Received: from ban25x6uut29.us.oracle.com (/10.153.73.29) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 15 Jan 2019 09:39:30 -0800 From: Krish Sadhukhan To: kvm@vger.kernel.org Cc: pbonzini@redhat.com, rkrcmar@redhat.com, jmattson@google.com Subject: [kvm-unit-test nVMX]: Check VM-exit MSR-load address on vmentry of L2 guests Date: Tue, 15 Jan 2019 12:14:44 -0500 Message-Id: <20190115171444.18766-1-krish.sadhukhan@oracle.com> X-Mailer: git-send-email 2.17.2 MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=9137 signatures=668682 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=1 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=709 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1901150145 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP According to section "Checks on VMX Controls" in Intel SDM vol 3C, the following checks performed for the VM-exit MSR-load address if the the VM-exit MSR-load count field is non-zero: - The lower 4 bits of the VM-exit MSR-load address must be 0. The address should not set any bits beyond the processor’s physical-address width. - The address of the last byte in the VM-exit MSR-load area should not set any bits beyond the processor’s physical-address width. The address of this last byte is VM-exit MSR-load address + (MSR count * 16) - 1. (The arithmetic used for the computation uses more bits than the processor’s physical-address width.) If IA32_VMX_BASIC[48] is read as 1, neither address should set any bits in the range 63:32. Signed-off-by: Krish Sadhukhan Reviewed-by: Karl Heubaum --- x86/vmx_tests.c | 70 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index ee0c9ff..771b508 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -4804,6 +4804,75 @@ static void test_vmx_preemption_timer(void) vmcs_write(EXI_CONTROLS, saved_exit); } +/* + * The following checks are performed for the VM-exit MSR-load address if + * the VM-exit MSR-load count field is non-zero: + * + * - The lower 4 bits of the VM-exit MSR-load address must be 0. + * The address should not set any bits beyond the processor’s + * physical-address width. + * + * - The address of the last byte in the VM-exit MSR-load area + * should not set any bits beyond the processor’s physical-address + * width. The address of this last byte is VM-exit MSR-load address + * + (MSR count * 16) - 1. (The arithmetic used for the computation + * uses more bits than the processor’s physical-address width.) + * + * If IA32_VMX_BASIC[48] is read as 1, neither address should set any bits + * in the range 63:32. + * + * [Intel SDM] + */ +static void test_exit_msr_load(void) +{ + exit_msr_load = alloc_page(); + u64 tmp; + u32 exit_msr_ld_cnt = 1; + int i; + u32 addr_len = 64; + + vmcs_write(EXI_MSR_LD_CNT, exit_msr_ld_cnt); + + /* Check first 4 bits of VM-exit MSR-load address */ + for (i = 0; i < 4; i++) { + tmp = (u64)exit_msr_load | 1ull << i; + vmcs_write(EXIT_MSR_LD_ADDR, tmp); + report_prefix_pushf("VM-exit MSR-load addr [4:0] %lx", + tmp & 0xf); + test_vmx_controls(false, false); + report_prefix_pop(); + } + + if (basic.val & (1ul << 48)) + addr_len = 32; + + test_vmcs_addr_values("VM-exit-MSR-load address", + EXIT_MSR_LD_ADDR, 16, false, false, + 4, addr_len - 1); + + /* + * Check last byte of VM-exit MSR-load address + */ + exit_msr_load = (struct vmx_msr_entry *)((u64)exit_msr_load & ~0xf); + + for (i = (addr_len == 64 ? cpuid_maxphyaddr(): addr_len); + i < 64; i++) { + tmp = ((u64)exit_msr_load + exit_msr_ld_cnt * 16 - 1) | + 1ul << i; + vmcs_write(EXIT_MSR_LD_ADDR, + tmp - (exit_msr_ld_cnt * 16 - 1)); + test_vmx_controls(false, false); + } + + vmcs_write(EXI_MSR_LD_CNT, 2); + vmcs_write(EXIT_MSR_LD_ADDR, (1ULL << cpuid_maxphyaddr()) - 16); + test_vmx_controls(false, false); + vmcs_write(EXIT_MSR_LD_ADDR, (1ULL << cpuid_maxphyaddr()) - 32); + test_vmx_controls(true, false); + vmcs_write(EXIT_MSR_LD_ADDR, (1ULL << cpuid_maxphyaddr()) - 48); + test_vmx_controls(true, false); +} + /* * Tests for VM-execution control fields */ @@ -4907,6 +4976,7 @@ static void test_exit_msr_store(void) static void test_vm_exit_ctls(void) { test_exit_msr_store(); + test_exit_msr_load(); } /*