| Message ID | 1548170749-12773-5-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 5f152018d340d90c185ced8ef6230b7044ea5540 |
| Delegated to: | Simon Horman |
| Headers | show |
| Series | Add Display support | expand |
Hi Biju, Thank you for the patch. On Tue, Jan 22, 2019 at 03:25:48PM +0000, Biju Das wrote: > Add du node to r8a7744 SoC DT. Boards that want to enable the DU > need to specify the output topology. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> I expect Simon to pick this up. > --- > arch/arm/boot/dts/r8a7744.dtsi | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi > index 8d25a0a..83804aa 100644 > --- a/arch/arm/boot/dts/r8a7744.dtsi > +++ b/arch/arm/boot/dts/r8a7744.dtsi > @@ -1645,8 +1645,14 @@ > }; > > du: display@feb00000 { > - reg = <0 0xfeb00000 0 0x40000>, > - <0 0xfeb90000 0 0x1c>; > + compatible = "renesas,du-r8a7744"; > + reg = <0 0xfeb00000 0 0x40000>; > + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 724>, > + <&cpg CPG_MOD 723>; > + clock-names = "du.0", "du.1"; > + status = "disabled"; > > ports { > #address-cells = <1>; > @@ -1663,7 +1669,6 @@ > }; > }; > }; > - /* placeholder */ > }; > > prr: chipid@ff000044 {
On Tue, Jan 22, 2019 at 07:07:51PM +0200, Laurent Pinchart wrote: > Hi Biju, > > Thank you for the patch. > > On Tue, Jan 22, 2019 at 03:25:48PM +0000, Biju Das wrote: > > Add du node to r8a7744 SoC DT. Boards that want to enable the DU > > need to specify the output topology. > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > I expect Simon to pick this up. Thanks, applied for v5.1.
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi index 8d25a0a..83804aa 100644 --- a/arch/arm/boot/dts/r8a7744.dtsi +++ b/arch/arm/boot/dts/r8a7744.dtsi @@ -1645,8 +1645,14 @@ }; du: display@feb00000 { - reg = <0 0xfeb00000 0 0x40000>, - <0 0xfeb90000 0 0x1c>; + compatible = "renesas,du-r8a7744"; + reg = <0 0xfeb00000 0 0x40000>; + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>; + clock-names = "du.0", "du.1"; + status = "disabled"; ports { #address-cells = <1>; @@ -1663,7 +1669,6 @@ }; }; }; - /* placeholder */ }; prr: chipid@ff000044 {
Add du node to r8a7744 SoC DT. Boards that want to enable the DU need to specify the output topology. Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- arch/arm/boot/dts/r8a7744.dtsi | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)