diff mbox series

[2/3] arm64: dts: renesas: r8a7796: Enable DMA for SCIF2

Message ID 97f26702bc95b5c3a72671d5c6675e4d6ee0a2f4.1548165440.git.horms+renesas@verge.net.au (mailing list archive)
State Accepted
Commit 97f26702bc95b5c3a72671d5c6675e4d6ee0a2f4
Delegated to: Simon Horman
Headers show
Series [GIT,PULL] Second Round of Renesas ARM Based SoC Fixes for v5.0 | expand

Commit Message

Simon Horman Jan. 24, 2019, 3:11 p.m. UTC 
From: Geert Uytterhoeven <geert+renesas@glider.be>

SCIF2 on R-Car M3-W can be used with both DMAC1 and DMAC2.

Fixes: dbcae5ea4bd27409 ("arm64: dts: r8a7796: Enable SCIF DMA")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm64/boot/dts/renesas/r8a7796.dtsi | 3 +++
 1 file changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index afedbf5728ec..0648d12778ed 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -1262,6 +1262,9 @@ 
 				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 				 <&scif_clk>;
 			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac1 0x13>, <&dmac1 0x12>,
+			       <&dmac2 0x13>, <&dmac2 0x12>;
+			dma-names = "tx", "rx", "tx", "rx";
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 			resets = <&cpg 310>;
 			status = "disabled";