Message ID | 20190125154120.19385-34-sean.j.christopherson@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | KVM: VMX: Move vCPU-run to proper asm sub-routine | expand |
On 25/01/19 16:41, Sean Christopherson wrote: > Move the clearing of the common registers (not 64-bit-only) to the start > of the flow that clears volatile registers holding guest state. This is > purely a cosmetic change so that the label doesn't point at a blank line > and a #define. "Volatile" (aka caller-save) refers to the previous version that used the stack to hide guest register values for callee-save registers. I've just removed that word from the commit message. Paolo
On Wed, Jan 30, 2019 at 05:03:05PM +0100, Paolo Bonzini wrote: > On 25/01/19 16:41, Sean Christopherson wrote: > > Move the clearing of the common registers (not 64-bit-only) to the start > > of the flow that clears volatile registers holding guest state. This is > > purely a cosmetic change so that the label doesn't point at a blank line > > and a #define. > > "Volatile" (aka caller-save) refers to the previous version that used > the stack to hide guest register values for callee-save registers. I've > just removed that word from the commit message. Thanks, forgot to account for the change to zap all registers.
diff --git a/arch/x86/kvm/vmx/vmenter.S b/arch/x86/kvm/vmx/vmenter.S index 900be1d542c8..79e5a50edd10 100644 --- a/arch/x86/kvm/vmx/vmenter.S +++ b/arch/x86/kvm/vmx/vmenter.S @@ -188,7 +188,12 @@ ENTRY(__vmx_vcpu_run) * free. RSP and RAX are exempt as RSP is restored by hardware during * VM-Exit and RAX is explicitly loaded with 0 or 1 to return VM-Fail. */ -1: +1: xor %ebx, %ebx + xor %ecx, %ecx + xor %edx, %edx + xor %esi, %esi + xor %edi, %edi + xor %ebp, %ebp #ifdef CONFIG_X86_64 xor %r8d, %r8d xor %r9d, %r9d @@ -199,12 +204,6 @@ ENTRY(__vmx_vcpu_run) xor %r14d, %r14d xor %r15d, %r15d #endif - xor %ebx, %ebx - xor %ecx, %ecx - xor %edx, %edx - xor %esi, %esi - xor %edi, %edi - xor %ebp, %ebp /* "POP" @regs. */ add $WORD_SIZE, %_ASM_SP
Move the clearing of the common registers (not 64-bit-only) to the start of the flow that clears volatile registers holding guest state. This is purely a cosmetic change so that the label doesn't point at a blank line and a #define. No functional change intended. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> --- arch/x86/kvm/vmx/vmenter.S | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-)