diff mbox series

drm/amd/powerplay: Fix missing break in switch

Message ID 20190125215533.GA4878@embeddedor (mailing list archive)
State New, archived
Headers show
Series drm/amd/powerplay: Fix missing break in switch | expand

Commit Message

Gustavo A. R. Silva Jan. 25, 2019, 9:55 p.m. UTC
Add missing break statement in order to prevent the code from falling
through to the default case.

The resoning for this is that pclk_vol_table is an automatic variable.
So, it makes no sense to update it just before falling through to the
default case and return -EINVAL.

This bug was found thanks to the ongoing efforts to enabling
-Wimplicit-fallthrough.

Fixes: cd70f3d6e3fa ("drm/amd/powerplay: PP/DAL interface changes for dynamic clock switch")
Cc: stable@vger.kernel.org
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Alex Deucher Jan. 28, 2019, 4:19 p.m. UTC | #1
On Fri, Jan 25, 2019 at 5:31 PM Gustavo A. R. Silva
<gustavo@embeddedor.com> wrote:
>
> Add missing break statement in order to prevent the code from falling
> through to the default case.
>
> The resoning for this is that pclk_vol_table is an automatic variable.
> So, it makes no sense to update it just before falling through to the
> default case and return -EINVAL.
>
> This bug was found thanks to the ongoing efforts to enabling
> -Wimplicit-fallthrough.
>
> Fixes: cd70f3d6e3fa ("drm/amd/powerplay: PP/DAL interface changes for dynamic clock switch")
> Cc: stable@vger.kernel.org
> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>

Applied.  Thanks!

Alex

> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> index f95c5f50eb0f..5273de3c5b98 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> @@ -1033,6 +1033,7 @@ static int smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr,
>                 break;
>         case amd_pp_dpp_clock:
>                 pclk_vol_table = pinfo->vdd_dep_on_dppclk;
> +               break;
>         default:
>                 return -EINVAL;
>         }
> --
> 2.20.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Gustavo A. R. Silva Jan. 28, 2019, 6:23 p.m. UTC | #2
On 1/28/19 10:19 AM, Alex Deucher wrote:
> On Fri, Jan 25, 2019 at 5:31 PM Gustavo A. R. Silva
> <gustavo@embeddedor.com> wrote:
>>
>> Add missing break statement in order to prevent the code from falling
>> through to the default case.
>>
>> The resoning for this is that pclk_vol_table is an automatic variable.
>> So, it makes no sense to update it just before falling through to the
>> default case and return -EINVAL.
>>
>> This bug was found thanks to the ongoing efforts to enabling
>> -Wimplicit-fallthrough.
>>
>> Fixes: cd70f3d6e3fa ("drm/amd/powerplay: PP/DAL interface changes for dynamic clock switch")
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
> 
> Applied.  Thanks!
> 

Great. :)

Thanks, Alex.
--
Gustavo
Sasha Levin Jan. 29, 2019, 12:35 a.m. UTC | #3
Hi,

[This is an automated email]

This commit has been processed because it contains a "Fixes:" tag,
fixing commit: cd70f3d6e3fa drm/amd/powerplay: PP/DAL interface changes for dynamic clock switch.

The bot has tested the following trees: v4.20.5, v4.19.18, v4.14.96.

v4.20.5: Build OK!
v4.19.18: Build OK!
v4.14.96: Failed to apply! Possible dependencies:
    Unable to calculate


How should we proceed with this patch?

--
Thanks,
Sasha
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
index f95c5f50eb0f..5273de3c5b98 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
@@ -1033,6 +1033,7 @@  static int smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr,
 		break;
 	case amd_pp_dpp_clock:
 		pclk_vol_table = pinfo->vdd_dep_on_dppclk;
+		break;
 	default:
 		return -EINVAL;
 	}