diff mbox series

drm/sun4i: tcon: Prepare and enable TCON channel 0 clock at init

Message ID 20190131132550.26355-1-paul.kocialkowski@bootlin.com (mailing list archive)
State New, archived
Headers show
Series drm/sun4i: tcon: Prepare and enable TCON channel 0 clock at init | expand

Commit Message

Paul Kocialkowski Jan. 31, 2019, 1:25 p.m. UTC
When initializing clocks, a reference to the TCON channel 0 clock is
obtained. However, the clock is never prepared and enabled later.
Switching from simplefb to DRM actually disables the clock (that was
usually configured by U-Boot) because of that.

On the V3s, this results in a hang when writing to some mixer registers
when switching over to DRM from simplefb.

Fix this by preparing and enabling the clock when initializing other
clocks. Waiting for sun4i_tcon_channel_enable to enable the clock is
apparently too late and results in the same mixer register access hang.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
---
 drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Maxime Ripard Feb. 1, 2019, 1:12 p.m. UTC | #1
On Thu, Jan 31, 2019 at 02:25:50PM +0100, Paul Kocialkowski wrote:
> When initializing clocks, a reference to the TCON channel 0 clock is
> obtained. However, the clock is never prepared and enabled later.
> Switching from simplefb to DRM actually disables the clock (that was
> usually configured by U-Boot) because of that.
> 
> On the V3s, this results in a hang when writing to some mixer registers
> when switching over to DRM from simplefb.
> 
> Fix this by preparing and enabling the clock when initializing other
> clocks. Waiting for sun4i_tcon_channel_enable to enable the clock is
> apparently too late and results in the same mixer register access hang.
> 
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>

Applied, thanks!
Maxime
diff mbox series

Patch

diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index e987615c16f1..b31f5d95cadb 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -371,6 +371,7 @@  static int sun4i_tcon_init_clocks(struct device *dev,
 		dev_err(dev, "Couldn't get the TCON channel 0 clock\n");
 		return PTR_ERR(tcon->sclk0);
 	}
+	clk_prepare_enable(tcon->sclk0);
 
 	if (tcon->quirks->has_channel_1) {
 		tcon->sclk1 = devm_clk_get(dev, "tcon-ch1");
@@ -385,6 +386,7 @@  static int sun4i_tcon_init_clocks(struct device *dev,
 
 static void sun4i_tcon_free_clocks(struct sun4i_tcon *tcon)
 {
+	clk_disable_unprepare(tcon->sclk0);
 	clk_disable_unprepare(tcon->clk);
 }