[v6,10/27] x86/power/64: Adapt assembly for PIE support

Message ID	20190131192533.34130-11-thgarnie@chromium.org (mailing list archive)
State	New, archived
Headers	show Return-Path: <kernel-hardening-return-15046-patchwork-kernel-hardening=patchwork.kernel.org@lists.openwall.com> Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk From: Thomas Garnier <thgarnie@chromium.org> To: kernel-hardening@lists.openwall.com Cc: kristen@linux.intel.com, Thomas Garnier <thgarnie@chromium.org>, Pavel Machek <pavel@ucw.cz>, "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>, "Rafael J. Wysocki" <rjw@rjwysocki.net>, Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>, "H. Peter Anvin" <hpa@zytor.com>, x86@kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 10/27] x86/power/64: Adapt assembly for PIE support Date: Thu, 31 Jan 2019 11:24:17 -0800 Message-Id: <20190131192533.34130-11-thgarnie@chromium.org> In-Reply-To: <20190131192533.34130-1-thgarnie@chromium.org> References: <20190131192533.34130-1-thgarnie@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit
Series	x86: PIE support and option to extend KASLR randomization \| expand [v6,00/27] x86: PIE support and option to extend KASLR randomization [v6,01/27] x86/crypto: Adapt assembly for PIE support [v6,02/27] x86: Use symbol name in jump table for PIE support [v6,03/27] x86: Add macro to get symbol address for PIE support [v6,04/27] x86: relocate_kernel - Adapt assembly for PIE support [v6,05/27] x86/entry/64: Adapt assembly for PIE support [v6,06/27] x86: pm-trace - Adapt assembly for PIE support [v6,07/27] x86/CPU: Adapt assembly for PIE support [v6,08/27] x86/acpi: Adapt assembly for PIE support [v6,09/27] x86/boot/64: Adapt assembly for PIE support [v6,10/27] x86/power/64: Adapt assembly for PIE support [v6,11/27] x86/paravirt: Adapt assembly for PIE support [v6,12/27] x86/alternatives: Adapt assembly for PIE support [v6,13/27] x86/boot/64: Build head64.c as mcmodel large when PIE is enabled [v6,14/27] x86/percpu: Adapt percpu for PIE support [v6,15/27] compiler: Option to default to hidden symbols [v6,16/27] compiler: Option to add PROVIDE_HIDDEN replacement for weak symbols [v6,17/27] x86/relocs: Handle PIE relocations [v6,18/27] xen: Adapt assembly for PIE support [v6,19/27] kvm: Adapt assembly for PIE support [v6,20/27] x86: Support global stack cookie [v6,21/27] x86/ftrace: Adapt function tracing for PIE support [v6,22/27] x86/modules: Add option to start module section after kernel [v6,23/27] x86/modules: Adapt module loading for PIE support [v6,24/27] x86/mm: Make the x86 GOT read-only [v6,25/27] x86/pie: Add option to build the kernel as PIE [v6,26/27] x86/relocs: Add option to generate 64-bit relocations [v6,27/27] x86/kaslr: Add option to extend KASLR range from 1GB to 3GB

Message ID

20190131192533.34130-11-thgarnie@chromium.org (mailing list archive)

State

New, archived

Headers

Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm
Precedence: bulk
From: Thomas Garnier <thgarnie@chromium.org>
To: kernel-hardening@lists.openwall.com
Cc: kristen@linux.intel.com,
	Thomas Garnier <thgarnie@chromium.org>,
	Pavel Machek <pavel@ucw.cz>,
	"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>,
	Borislav Petkov <bp@alien8.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	x86@kernel.org,
	linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v6 10/27] x86/power/64: Adapt assembly for PIE support
Date: Thu, 31 Jan 2019 11:24:17 -0800
Message-Id: <20190131192533.34130-11-thgarnie@chromium.org>
In-Reply-To: <20190131192533.34130-1-thgarnie@chromium.org>
References: <20190131192533.34130-1-thgarnie@chromium.org>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit

Series

x86: PIE support and option to extend KASLR randomization | expand

Commit Message

Thomas Garnier Jan. 31, 2019, 7:24 p.m. UTC

Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.

Position Independent Executable (PIE) support will allow to extend the
KASLR randomization range below 0xffffffff80000000.

Signed-off-by: Thomas Garnier <thgarnie@chromium.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
---
 arch/x86/power/hibernate_asm_64.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/power/hibernate_asm_64.S b/arch/x86/power/hibernate_asm_64.S
index 3008baa2fa95..9ed980efef72 100644
--- a/arch/x86/power/hibernate_asm_64.S
+++ b/arch/x86/power/hibernate_asm_64.S
@@ -24,7 +24,7 @@ 
 #include <asm/frame.h>
 
 ENTRY(swsusp_arch_suspend)
-	movq	$saved_context, %rax
+	leaq	saved_context(%rip), %rax
 	movq	%rsp, pt_regs_sp(%rax)
 	movq	%rbp, pt_regs_bp(%rax)
 	movq	%rsi, pt_regs_si(%rax)
@@ -115,7 +115,7 @@  ENTRY(restore_registers)
 	movq	%rax, %cr4;  # turn PGE back on
 
 	/* We don't restore %rax, it must be 0 anyway */
-	movq	$saved_context, %rax
+	leaq	saved_context(%rip), %rax
 	movq	pt_regs_sp(%rax), %rsp
 	movq	pt_regs_bp(%rax), %rbp
 	movq	pt_regs_si(%rax), %rsi

[v6,10/27] x86/power/64: Adapt assembly for PIE support

Commit Message

Patch