| Message ID | 20190202150638.13672-2-ccaione@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add and document the i.MX8MQ OTP controller | expand |
Am Samstag, den 02.02.2019, 15:06 +0000 schrieb Carlo Caione: > Add the node for the OTP controller. The IP is the same as on the imx7d. > > Signed-off-by: Carlo Caione <ccaione@baylibre.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > --- > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index c34cabe9b356..f37f17b71151 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -241,6 +241,14 @@ > reg = <0x30340000 0x10000>; > }; > > + ocotp: ocotp-ctrl@30350000 { > + compatible = "fsl,imx8mq-ocotp", "fsl,imx7d-ocotp", "syscon"; > + reg = <0x30350000 0x10000>; > + clocks = <&clk IMX8MQ_CLK_OCOTP_ROOT>; > + #address-cells = <1>; > + #size-cells = <1>; > + }; > + > anatop: syscon@30360000 { > compatible = "fsl,imx8mq-anatop", "syscon"; > reg = <0x30360000 0x10000>;
Am Samstag, den 02.02.2019, 15:06 +0000 schrieb Carlo Caione: > Add the node for the OTP controller. The IP is the same as on the imx7d. This is not true. According to the reference manual, the OCOTP controller on i.MX8MQ uses the non-banked write mode, same as i.MX6. Thus it is incompatible to the i.MX7 OCOTP. Also the number of fuses is different, so we really need some driver support for the imx8mq compatible and can't declare the controller compatible to some older instance. Regards, Lucas > Signed-off-by: Carlo Caione <ccaione@baylibre.com> > --- > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index c34cabe9b356..f37f17b71151 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -241,6 +241,14 @@ > reg = <0x30340000 0x10000>; > }; > > + ocotp: ocotp-ctrl@30350000 { > + compatible = "fsl,imx8mq-ocotp", "fsl,imx7d-ocotp", "syscon"; > + reg = <0x30350000 0x10000>; > + clocks = <&clk IMX8MQ_CLK_OCOTP_ROOT>; > + #address-cells = <1>; > + #size-cells = <1>; > + }; > + > anatop: syscon@30360000 { > compatible = "fsl,imx8mq-anatop", "syscon"; > reg = <0x30360000 0x10000>;
Am Montag, den 11.02.2019, 13:03 +0100 schrieb Lucas Stach: > Am Samstag, den 02.02.2019, 15:06 +0000 schrieb Carlo Caione: > > Add the node for the OTP controller. The IP is the same as on the > > imx7d. > > This is not true. According to the reference manual, the OCOTP > controller on i.MX8MQ uses the non-banked write mode, same as i.MX6. > Thus it is incompatible to the i.MX7 OCOTP. Actually I need to correct myself here. While the programming sequence description is the same as on i.MX6, the register layout looks like the i.MX7 one, so likely someone copy and pasted the wrong documentation snippet. This means the controller is in fact compatible to the i.MX7 write sequence. > Also the number of fuses is different, so we really need some driver > support for the imx8mq compatible and can't declare the controller > compatible to some older instance. But then I think this is still true. The changed number of fuses means we need some driver support and should not claim backward compatibility with the i.MX7 controller. regards, Lucas
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index c34cabe9b356..f37f17b71151 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -241,6 +241,14 @@ reg = <0x30340000 0x10000>; }; + ocotp: ocotp-ctrl@30350000 { + compatible = "fsl,imx8mq-ocotp", "fsl,imx7d-ocotp", "syscon"; + reg = <0x30350000 0x10000>; + clocks = <&clk IMX8MQ_CLK_OCOTP_ROOT>; + #address-cells = <1>; + #size-cells = <1>; + }; + anatop: syscon@30360000 { compatible = "fsl,imx8mq-anatop", "syscon"; reg = <0x30360000 0x10000>;
Add the node for the OTP controller. The IP is the same as on the imx7d. Signed-off-by: Carlo Caione <ccaione@baylibre.com> --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)