| Message ID | 20190202152626.1006-2-govinds@codeaurora.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add non PAS wcss Q6 support for QCS404 | expand |
On Sat 02 Feb 07:26 PST 2019, Govind Singh wrote: > Add device tree bindings for WiFi QDSP gcc clock controls found in > QCS404 soc. > > Signed-off-by: Govind Singh <govinds@codeaurora.org> > Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > --- > include/dt-bindings/clock/qcom,gcc-qcs404.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/include/dt-bindings/clock/qcom,gcc-qcs404.h b/include/dt-bindings/clock/qcom,gcc-qcs404.h > index 00ab0d77b38a..f5dfc1890870 100644 > --- a/include/dt-bindings/clock/qcom,gcc-qcs404.h > +++ b/include/dt-bindings/clock/qcom,gcc-qcs404.h > @@ -146,6 +146,8 @@ > #define GCC_MDP_TBU_CLK 138 > #define GCC_QDSS_DAP_CLK 139 > #define GCC_DCC_XO_CLK 140 > +#define GCC_WCSS_Q6_AHB_CLK 141 > +#define GCC_WCSS_Q6_AXIM_CLK 142 > > #define GCC_GENI_IR_BCR 0 > #define GCC_USB_HS_BCR 1 > @@ -168,5 +170,6 @@ > #define GCC_PCIE_0_CORE_STICKY_ARES 18 > #define GCC_PCIE_0_SLEEP_ARES 19 > #define GCC_PCIE_0_PIPE_ARES 20 > +#define GCC_WDSP_RESTART 21 > > #endif > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project >
diff --git a/include/dt-bindings/clock/qcom,gcc-qcs404.h b/include/dt-bindings/clock/qcom,gcc-qcs404.h index 00ab0d77b38a..f5dfc1890870 100644 --- a/include/dt-bindings/clock/qcom,gcc-qcs404.h +++ b/include/dt-bindings/clock/qcom,gcc-qcs404.h @@ -146,6 +146,8 @@ #define GCC_MDP_TBU_CLK 138 #define GCC_QDSS_DAP_CLK 139 #define GCC_DCC_XO_CLK 140 +#define GCC_WCSS_Q6_AHB_CLK 141 +#define GCC_WCSS_Q6_AXIM_CLK 142 #define GCC_GENI_IR_BCR 0 #define GCC_USB_HS_BCR 1 @@ -168,5 +170,6 @@ #define GCC_PCIE_0_CORE_STICKY_ARES 18 #define GCC_PCIE_0_SLEEP_ARES 19 #define GCC_PCIE_0_PIPE_ARES 20 +#define GCC_WDSP_RESTART 21 #endif