From patchwork Mon Feb 4 17:36:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Gonzalez X-Patchwork-Id: 10796209 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 22E176C2 for ; Mon, 4 Feb 2019 17:43:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 107992BEC5 for ; Mon, 4 Feb 2019 17:43:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 043572BED0; Mon, 4 Feb 2019 17:43:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,FREEMAIL_FROM, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 998162BEC5 for ; Mon, 4 Feb 2019 17:43:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728589AbfBDRnl (ORCPT ); Mon, 4 Feb 2019 12:43:41 -0500 Received: from smtp3-g21.free.fr ([212.27.42.3]:49375 "EHLO smtp3-g21.free.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728413AbfBDRnl (ORCPT ); Mon, 4 Feb 2019 12:43:41 -0500 Received: from [192.168.108.68] (unknown [213.36.7.13]) (Authenticated sender: marc.w.gonzalez) by smtp3-g21.free.fr (Postfix) with ESMTPSA id 9CBBA13F880; Mon, 4 Feb 2019 18:43:22 +0100 (CET) Subject: [PATCH v3 1/5] arm64: dts: qcom: msm8998: Add UFS nodes From: Marc Gonzalez To: MSM , LKML Cc: Jeffrey Hugo , Bjorn Andersson , Andy Gross , David Brown , Evan Green , Douglas Anderson References: Message-ID: Date: Mon, 4 Feb 2019 18:36:41 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add host controller and PHY DT nodes. Signed-off-by: Marc Gonzalez Reviewed-by: Jeffrey Hugo --- vddp-ref-clk-max-microamp = <100>; sounds tiny and fishy. Jeffrey, Bjorn, can you check? The PHY driver doesn't seem to try to set any load... --- arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi | 19 +++++++ arch/arm64/boot/dts/qcom/msm8998.dtsi | 63 +++++++++++++++++++++++ 2 files changed, 82 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi index 50e9033aa7f6..80075283847a 100644 --- a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi @@ -257,3 +257,22 @@ pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; }; + +&ufshc { + vcc-supply = <&vreg_l20a_2p95>; + vccq-supply = <&vreg_l26a_1p2>; + vccq2-supply = <&vreg_s4a_1p8>; + vcc-max-microamp = <750000>; + vccq-max-microamp = <560000>; + vccq2-max-microamp = <750000>; +}; + +&ufsphy { + vdda-phy-supply = <&vreg_l1a_0p875>; + vdda-pll-supply = <&vreg_l2a_1p2>; + vddp-ref-clk-supply = <&vreg_l26a_1p2>; + vdda-phy-max-microamp = <51400>; + vdda-pll-max-microamp = <14600>; + vddp-ref-clk-max-microamp = <100>; + vddp-ref-clk-always-on; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 6f4f4b79853b..831af20143da 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -711,6 +711,69 @@ redistributor-stride = <0x0 0x20000>; interrupts = ; }; + + ufshc: ufshc@1da4000 { + compatible = "qcom,msm8998-ufshc", "qcom,ufshc", + "jedec,ufs-2.0"; + reg = <0x01da4000 0x2500>; + interrupts = ; + phys = <&ufsphy_lanes>; + phy-names = "ufsphy"; + lanes-per-direction = <2>; + power-domains = <&gcc UFS_GDSC>; + + clock-names = + "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "rx_lane1_sync_clk"; + clocks = + <&gcc GCC_UFS_AXI_CLK>, + <&gcc GCC_AGGRE1_UFS_AXI_CLK>, + <&gcc GCC_UFS_AHB_CLK>, + <&gcc GCC_UFS_UNIPRO_CORE_CLK>, + <&rpmcc RPM_SMD_LN_BB_CLK1>, + <&gcc GCC_UFS_TX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_RX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_RX_SYMBOL_1_CLK>; + freq-table-hz = + <50000000 200000000>, + <0 0>, + <0 0>, + <37500000 150000000>, + <0 0>, + <0 0>, + <0 0>, + <0 0>; + + resets = <&gcc GCC_UFS_BCR>; + reset-names = "rst"; + }; + + ufsphy: phy@1da7000 { + compatible = "qcom,msm8998-qmp-ufs-phy"; + reg = <0x01da7000 0x18c>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clock-names = "ref", "ref_aux"; + clocks = + <&gcc GCC_UFS_CLKREF_CLK>, + <&gcc GCC_UFS_PHY_AUX_CLK>; + + ufsphy_lanes: lanes@1da7400 { + reg = <0x01da7400 0x128>, + <0x01da7600 0x1fc>, + <0x01da7c00 0x1dc>, + <0x01da7800 0x128>, + <0x01da7a00 0x1fc>; + #phy-cells = <0>; + }; + }; }; };