From patchwork Wed Feb 6 05:13:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10798817 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6FC3C13B5 for ; Wed, 6 Feb 2019 05:13:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5CC952ADBB for ; Wed, 6 Feb 2019 05:13:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 510C82ADF4; Wed, 6 Feb 2019 05:13:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B94DF2ADBB for ; Wed, 6 Feb 2019 05:13:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727830AbfBFFNu (ORCPT ); Wed, 6 Feb 2019 00:13:50 -0500 Received: from mail-pl1-f195.google.com ([209.85.214.195]:46433 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727756AbfBFFNs (ORCPT ); Wed, 6 Feb 2019 00:13:48 -0500 Received: by mail-pl1-f195.google.com with SMTP id o6so2559313pls.13 for ; Tue, 05 Feb 2019 21:13:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7GluNEYIYq7F+AEH/HbazVyyzUsPwLBNFtLOwueywr4=; b=olCPqWZkszTummcLF45fgSS6Be0r4s970GM4lIGJG9B/+d9N8Fxy70sK+n3s50kPK+ 5tu4ImXkCoDV28G+iAye35ofFuuDYUdvgipmEcrRo9wQLLVVHo8WFraxm/SYiIcDQTaw mR0hrE7KK2kVXPMMl5WczmHP39d59X6uKFSAC32YbfIX3Zbn5nS3/epiiDTUEQ/N5nda WOZ7ZoOeZ8uAh5o5eT/W8YPG3rODa4reiyPhaJarlcmlOSzt+UWhgsAgISojGlcBfuxC UFXmCfAH/HtzAZbGU8KXf2FGGR4cL2duTCktq4coq2bJixpPayAqSDy3G0KE9cKaQyt1 5Miw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7GluNEYIYq7F+AEH/HbazVyyzUsPwLBNFtLOwueywr4=; b=pgPFbjdwRbeqExnb6PaUMZxvPM/i99ER4RxZuN+1/+ZFxNMvR/9uOn1V2AmNhYtHjj S9OeI9+xMOOKNFWFPlMlPcUxPxy/aAZY4wSEzjGbIiFIuLJBoPTcnUc5B5c1YEddtiFo dJHv/V6dogXErfM4hnkgg83QWpbCQPpHoKLIwd2SAYj6lkPRtRHIwq/YeuiJrFiCTUn3 T1vPlBiGqpckDLchpXtzynq3zcRQ6DNX+FK61gEE0QFShET0vHOHsFKRXxeI8k86WG3o fjBLOZT9FrDJtNJDkjZ8o3NrxUWHep1eXA1eskvZvYrcyc8lFITBFExOy8JOh9B25YWR v0OQ== X-Gm-Message-State: AHQUAuada0sH6MD44/Umvm45Es/dh1CMf/umthIFsnXX7tPEOthst5ek RZDrIK6OeVYGtF29qfpU03OQMg== X-Google-Smtp-Source: AHgI3IZK49kdzp565XwPjiogxRJu4Wk2gPAo7z6qcWVY99mk5isv/aEpBy89/pEQrE/OFgP7IS/2hw== X-Received: by 2002:a17:902:9b87:: with SMTP id y7mr8931954plp.336.1549430027126; Tue, 05 Feb 2019 21:13:47 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id y71sm10735012pfi.123.2019.02.05.21.13.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 Feb 2019 21:13:46 -0800 (PST) From: Bjorn Andersson To: Andy Gross Cc: David Brown , Rob Herring , Mark Rutland , Arun Kumar Neelakantam , Sibi Sankar , Doug Anderson , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 4/8] dt-bindings: soc: qcom: Add AOSS QMP binding Date: Tue, 5 Feb 2019 21:13:31 -0800 Message-Id: <20190206051335.23799-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190206051335.23799-1-bjorn.andersson@linaro.org> References: <20190206051335.23799-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add binding for the QMP based side-channel communication mechanism to the AOSS, which is used to control resources not exposed through the RPMh interface. Reviewed-by: Rob Herring Reviewed-by: Stephen Boyd Signed-off-by: Bjorn Andersson --- Changes since v5: - None .../bindings/soc/qcom/qcom,aoss-qmp.txt | 76 +++++++++++++++++++ include/dt-bindings/power/qcom-aoss-qmp.h | 15 ++++ 2 files changed, 91 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt create mode 100644 include/dt-bindings/power/qcom-aoss-qmp.h diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt new file mode 100644 index 000000000000..9ce6c42192ad --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt @@ -0,0 +1,76 @@ +Qualcomm Always-On Subsystem side channel binding + +This binding describes the hardware component responsible for side channel +requests to the always-on subsystem (AOSS), used for certain power management +requests that is not handled by the standard RPMh interface. Each client in the +SoC has it's own block of message RAM and IRQ for communication with the AOSS. +The protocol used to communicate in the message RAM is known as Qualcomm +Messagin Protocol (QMP) + +The AOSS side channel exposes control over a set of resources, used to control +a set of debug related clocks and to affect the low power state of resources +related to the secondary subsystems. These resources are exposed as a set of +power-domains. + +- compatible: + Usage: required + Value type: + Definition: must be "qcom,sdm845-aoss-qmp" + +- reg: + Usage: required + Value type: + Definition: the base address and size of the message RAM for this + client's communication with the AOSS + +- interrupts: + Usage: required + Value type: + Definition: should specify the AOSS message IRQ for this client + +- mboxes: + Usage: required + Value type: + Definition: reference to the mailbox representing the outgoing doorbell + in APCS for this client, as described in mailbox/mailbox.txt + +- #power-domain-cells: + Usage: optional + Value type: + Definition: must be 1 + The provided power-domains are: + QDSS clock-domain (0), CDSP state (1), LPASS state (2), + modem state (3), SLPI state (4), SPSS state (5) and Venus + state (6). + += SUBNODES +The AOSS side channel also provides the controls for three cooling devices, +these are expressed as subnodes of the QMP node. The name of the node is used +to identify the resource and must therefor be "cx", "mx" or "ebi". + +- #cooling-cells: + Usage: optional + Value type: + Definition: must be 2 + += EXAMPLE + +The following example represents the AOSS side-channel message RAM and the +mechanism exposing the power-domains, as found in SDM845. + + aoss_qmp: qmp@c300000 { + compatible = "qcom,sdm845-aoss-qmp"; + reg = <0x0c300000 0x100000>; + interrupts = ; + mboxes = <&apss_shared 0>; + + #power-domain-cells = <1>; + + cx_cdev: cx { + #cooling-cells = <2>; + }; + + mx_cdev: mx { + #cooling-cells = <2>; + }; + }; diff --git a/include/dt-bindings/power/qcom-aoss-qmp.h b/include/dt-bindings/power/qcom-aoss-qmp.h new file mode 100644 index 000000000000..7d8ac1a4f90c --- /dev/null +++ b/include/dt-bindings/power/qcom-aoss-qmp.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2018, Linaro Ltd. */ + +#ifndef __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H +#define __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H + +#define AOSS_QMP_QDSS_CLK 0 +#define AOSS_QMP_LS_CDSP 1 +#define AOSS_QMP_LS_LPASS 2 +#define AOSS_QMP_LS_MODEM 3 +#define AOSS_QMP_LS_SLPI 4 +#define AOSS_QMP_LS_SPSS 5 +#define AOSS_QMP_LS_VENUS 6 + +#endif