Message ID | 1549528310-54436-2-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
---|---|
State | Accepted |
Commit | ee20aeefb53f6ffabed5b1a3b859294197eeb351 |
Delegated to: | Simon Horman |
Headers | show |
Series | [1/2] arm64: dts: renesas: r8a774c0-cat874: Add pciec0 support | expand |
On Thu, Feb 7, 2019 at 9:37 AM Biju Das <biju.das@bp.renesas.com> wrote: > This patch enables PCIEC0 PCI express controller on the sub board. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On Thu, Feb 07, 2019 at 11:13:21AM +0100, Geert Uytterhoeven wrote: > On Thu, Feb 7, 2019 at 9:37 AM Biju Das <biju.das@bp.renesas.com> wrote: > > This patch enables PCIEC0 PCI express controller on the sub board. > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Thanks, applied for v5.1.
diff --git a/arch/arm64/boot/dts/renesas/cat875.dtsi b/arch/arm64/boot/dts/renesas/cat875.dtsi index 805ffa7..14db667 100644 --- a/arch/arm64/boot/dts/renesas/cat875.dtsi +++ b/arch/arm64/boot/dts/renesas/cat875.dtsi @@ -30,6 +30,10 @@ }; }; +&pciec0 { + status = "okay"; +}; + &pfc { avb_pins: avb { mux {
This patch enables PCIEC0 PCI express controller on the sub board. Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- This patch is tested against renesas-dev --- arch/arm64/boot/dts/renesas/cat875.dtsi | 4 ++++ 1 file changed, 4 insertions(+)