| Message ID | 20190211131004.11634-1-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Include the current timeline seqno for debugging execlists | expand |
On 11/02/2019 13:10, Chris Wilson wrote: > While this is mainly only useful for ELSP[0], it is definitely useful to > know the current timeline seqno wrt to the queued set of requests for > that port, as this carries additional information above and beyond the > near-defunct global_seqno and global HWSP. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > --- > drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c > index 49fa43ff02ba..2547e2e51db8 100644 > --- a/drivers/gpu/drm/i915/intel_engine_cs.c > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c > @@ -1425,10 +1425,11 @@ static void intel_engine_print_registers(const struct intel_engine_cs *engine, > char hdr[80]; > > snprintf(hdr, sizeof(hdr), > - "\t\tELSP[%d] count=%d, ring:{start:%08x, hwsp:%08x}, rq: ", > + "\t\tELSP[%d] count=%d, ring:{start:%08x, hwsp:%08x, seqno:%08x}, rq: ", > idx, count, > i915_ggtt_offset(rq->ring->vma), > - rq->timeline->hwsp_offset); > + rq->timeline->hwsp_offset, > + hwsp_seqno(rq)); > print_request(m, rq, hdr); > } else { > drm_printf(m, "\t\tELSP[%d] idle\n", idx); > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index 49fa43ff02ba..2547e2e51db8 100644 --- a/drivers/gpu/drm/i915/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/intel_engine_cs.c @@ -1425,10 +1425,11 @@ static void intel_engine_print_registers(const struct intel_engine_cs *engine, char hdr[80]; snprintf(hdr, sizeof(hdr), - "\t\tELSP[%d] count=%d, ring:{start:%08x, hwsp:%08x}, rq: ", + "\t\tELSP[%d] count=%d, ring:{start:%08x, hwsp:%08x, seqno:%08x}, rq: ", idx, count, i915_ggtt_offset(rq->ring->vma), - rq->timeline->hwsp_offset); + rq->timeline->hwsp_offset, + hwsp_seqno(rq)); print_request(m, rq, hdr); } else { drm_printf(m, "\t\tELSP[%d] idle\n", idx);
While this is mainly only useful for ELSP[0], it is definitely useful to know the current timeline seqno wrt to the queued set of requests for that port, as this carries additional information above and beyond the near-defunct global_seqno and global HWSP. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)