Message ID | 20190225202907.731-11-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Polish DRAM information readout code | expand |
On Mon, 25 Feb 2019, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Remove the pointless zero initialization of bunch of things > (the thing is kzalloc()ed). > > Also throw out the mostly useless on-stack string. I think > it'll be clear enough from the logs that 0 means unknown. Yeah. Alternatively you could just do DRM_DEBUG_KMS in both if branches instead of using a buffer. Reviewed-by: Jani Nikula <jani.nikula@intel.com> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_drv.c | 16 ++++------------ > 1 file changed, 4 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 21413069a480..e3aafe2bf3b7 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -1357,14 +1357,8 @@ static void > intel_get_dram_info(struct drm_i915_private *dev_priv) > { > struct dram_info *dram_info = &dev_priv->dram_info; > - char bandwidth_str[32]; > int ret; > > - dram_info->valid = false; > - dram_info->ranks = 0; > - dram_info->bandwidth_kbps = 0; > - dram_info->num_channels = 0; > - > /* > * Assume 16Gb DIMMs are present until proven otherwise. > * This is only used for the level 0 watermark latency > @@ -1385,12 +1379,10 @@ intel_get_dram_info(struct drm_i915_private *dev_priv) > if (ret) > return; > > - if (dram_info->bandwidth_kbps) > - sprintf(bandwidth_str, "%d KBps", dram_info->bandwidth_kbps); > - else > - sprintf(bandwidth_str, "unknown"); > - DRM_DEBUG_KMS("DRAM bandwidth:%s, total-channels: %u\n", > - bandwidth_str, dram_info->num_channels); > + DRM_DEBUG_KMS("DRAM bandwidth: %u kBps, channels: %u\n", > + dram_info->bandwidth_kbps, > + dram_info->num_channels); > + > DRM_DEBUG_KMS("DRAM ranks: %d, 16Gb DIMMs: %s\n", > dram_info->ranks, yesno(dram_info->is_16gb_dimm)); > }
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 21413069a480..e3aafe2bf3b7 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1357,14 +1357,8 @@ static void intel_get_dram_info(struct drm_i915_private *dev_priv) { struct dram_info *dram_info = &dev_priv->dram_info; - char bandwidth_str[32]; int ret; - dram_info->valid = false; - dram_info->ranks = 0; - dram_info->bandwidth_kbps = 0; - dram_info->num_channels = 0; - /* * Assume 16Gb DIMMs are present until proven otherwise. * This is only used for the level 0 watermark latency @@ -1385,12 +1379,10 @@ intel_get_dram_info(struct drm_i915_private *dev_priv) if (ret) return; - if (dram_info->bandwidth_kbps) - sprintf(bandwidth_str, "%d KBps", dram_info->bandwidth_kbps); - else - sprintf(bandwidth_str, "unknown"); - DRM_DEBUG_KMS("DRAM bandwidth:%s, total-channels: %u\n", - bandwidth_str, dram_info->num_channels); + DRM_DEBUG_KMS("DRAM bandwidth: %u kBps, channels: %u\n", + dram_info->bandwidth_kbps, + dram_info->num_channels); + DRM_DEBUG_KMS("DRAM ranks: %d, 16Gb DIMMs: %s\n", dram_info->ranks, yesno(dram_info->is_16gb_dimm)); }