| Message ID | 20190226102404.29153-7-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [01/11] drm/i915: Skip scanning for signalers if we are already inflight | expand |
On 26/02/2019 10:24, Chris Wilson wrote: > Do a pass over all the engines upon starting to determine the global > scheduler capability flags (those that are agreed upon by all). > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > --- > drivers/gpu/drm/i915/i915_gem.c | 2 ++ > drivers/gpu/drm/i915/intel_engine_cs.c | 39 +++++++++++++++++++++++++ > drivers/gpu/drm/i915/intel_lrc.c | 6 ---- > drivers/gpu/drm/i915/intel_ringbuffer.h | 2 ++ > 4 files changed, 43 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 713ed6fbdcc8..f6fe10fce0ec 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -4700,6 +4700,8 @@ static int __i915_gem_restart_engines(void *data) > } > } > > + intel_engines_set_scheduler_caps(i915); > + > return 0; > } > > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c > index b7b626195eda..ef49b1b0537b 100644 > --- a/drivers/gpu/drm/i915/intel_engine_cs.c > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c > @@ -608,6 +608,45 @@ int intel_engine_setup_common(struct intel_engine_cs *engine) > return err; > } > > +void intel_engines_set_scheduler_caps(struct drm_i915_private *i915) > +{ > + static const struct { > + u8 engine; > + u8 sched; > + } map[] = { > +#define MAP(x, y) { ilog2(I915_ENGINE_HAS_##x), ilog2(I915_SCHEDULER_CAP_##y) } > + MAP(PREEMPTION, PREEMPTION), > +#undef MAP > + }; > + struct intel_engine_cs *engine; > + enum intel_engine_id id; > + u32 enabled, disabled; > + > + enabled = 0; > + disabled = 0; > + for_each_engine(engine, i915, id) { /* all engines must agree! */ > + int i; > + > + if (engine->schedule) > + enabled |= (I915_SCHEDULER_CAP_ENABLED | > + I915_SCHEDULER_CAP_PRIORITY); > + else > + disabled |= (I915_SCHEDULER_CAP_ENABLED | > + I915_SCHEDULER_CAP_PRIORITY); > + > + for (i = 0; i < ARRAY_SIZE(map); i++) { > + if (engine->flags & BIT(map[i].engine)) > + enabled |= BIT(map[i].sched); > + else > + disabled |= BIT(map[i].sched); > + } > + } > + > + i915->caps.scheduler = enabled & ~disabled; > + if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_ENABLED)) > + i915->caps.scheduler = 0; > +} > + > static void __intel_context_unpin(struct i915_gem_context *ctx, > struct intel_engine_cs *engine) > { > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c > index 29b2a2f34edb..f57cfe2fc078 100644 > --- a/drivers/gpu/drm/i915/intel_lrc.c > +++ b/drivers/gpu/drm/i915/intel_lrc.c > @@ -2327,12 +2327,6 @@ void intel_execlists_set_default_submission(struct intel_engine_cs *engine) > engine->flags |= I915_ENGINE_SUPPORTS_STATS; > if (engine->i915->preempt_context) > engine->flags |= I915_ENGINE_HAS_PREEMPTION; > - > - engine->i915->caps.scheduler = > - I915_SCHEDULER_CAP_ENABLED | > - I915_SCHEDULER_CAP_PRIORITY; > - if (intel_engine_has_preemption(engine)) > - engine->i915->caps.scheduler |= I915_SCHEDULER_CAP_PREEMPTION; > } > > static void > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h > index 5284f243931a..b8ec7e40a59b 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.h > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h > @@ -576,6 +576,8 @@ intel_engine_has_preemption(const struct intel_engine_cs *engine) > return engine->flags & I915_ENGINE_HAS_PREEMPTION; > } > > +void intel_engines_set_scheduler_caps(struct drm_i915_private *i915); > + > static inline bool __execlists_need_preempt(int prio, int last) > { > /* > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 713ed6fbdcc8..f6fe10fce0ec 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4700,6 +4700,8 @@ static int __i915_gem_restart_engines(void *data) } } + intel_engines_set_scheduler_caps(i915); + return 0; } diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index b7b626195eda..ef49b1b0537b 100644 --- a/drivers/gpu/drm/i915/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/intel_engine_cs.c @@ -608,6 +608,45 @@ int intel_engine_setup_common(struct intel_engine_cs *engine) return err; } +void intel_engines_set_scheduler_caps(struct drm_i915_private *i915) +{ + static const struct { + u8 engine; + u8 sched; + } map[] = { +#define MAP(x, y) { ilog2(I915_ENGINE_HAS_##x), ilog2(I915_SCHEDULER_CAP_##y) } + MAP(PREEMPTION, PREEMPTION), +#undef MAP + }; + struct intel_engine_cs *engine; + enum intel_engine_id id; + u32 enabled, disabled; + + enabled = 0; + disabled = 0; + for_each_engine(engine, i915, id) { /* all engines must agree! */ + int i; + + if (engine->schedule) + enabled |= (I915_SCHEDULER_CAP_ENABLED | + I915_SCHEDULER_CAP_PRIORITY); + else + disabled |= (I915_SCHEDULER_CAP_ENABLED | + I915_SCHEDULER_CAP_PRIORITY); + + for (i = 0; i < ARRAY_SIZE(map); i++) { + if (engine->flags & BIT(map[i].engine)) + enabled |= BIT(map[i].sched); + else + disabled |= BIT(map[i].sched); + } + } + + i915->caps.scheduler = enabled & ~disabled; + if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_ENABLED)) + i915->caps.scheduler = 0; +} + static void __intel_context_unpin(struct i915_gem_context *ctx, struct intel_engine_cs *engine) { diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 29b2a2f34edb..f57cfe2fc078 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -2327,12 +2327,6 @@ void intel_execlists_set_default_submission(struct intel_engine_cs *engine) engine->flags |= I915_ENGINE_SUPPORTS_STATS; if (engine->i915->preempt_context) engine->flags |= I915_ENGINE_HAS_PREEMPTION; - - engine->i915->caps.scheduler = - I915_SCHEDULER_CAP_ENABLED | - I915_SCHEDULER_CAP_PRIORITY; - if (intel_engine_has_preemption(engine)) - engine->i915->caps.scheduler |= I915_SCHEDULER_CAP_PREEMPTION; } static void diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 5284f243931a..b8ec7e40a59b 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -576,6 +576,8 @@ intel_engine_has_preemption(const struct intel_engine_cs *engine) return engine->flags & I915_ENGINE_HAS_PREEMPTION; } +void intel_engines_set_scheduler_caps(struct drm_i915_private *i915); + static inline bool __execlists_need_preempt(int prio, int last) { /*
Do a pass over all the engines upon starting to determine the global scheduler capability flags (those that are agreed upon by all). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/i915_gem.c | 2 ++ drivers/gpu/drm/i915/intel_engine_cs.c | 39 +++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_lrc.c | 6 ---- drivers/gpu/drm/i915/intel_ringbuffer.h | 2 ++ 4 files changed, 43 insertions(+), 6 deletions(-)