Message ID | 1551252192-535-6-git-send-email-stanley.chu@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v3,1/7] scsi: ufs: Introduce ufshcd_get_pwr_dev_param | expand |
On Wed, Feb 27, 2019 at 03:23:09PM +0800, Stanley Chu wrote: > Add UFS M-PHY node document for MediaTek SoC chips. > > Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> > --- > .../devicetree/bindings/phy/phy-mtk-ufs.txt | 35 +++++++++++++++++++ > 1 file changed, 35 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > new file mode 100644 > index 000000000000..5fc22c7fe0bc > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > @@ -0,0 +1,35 @@ > +MediaTek Universal Flash Storage (UFS) M-PHY binding > +-------------------------------------------------------- > + > +UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro. > +Each UFS M-PHY node should have its own node. > + > +To bind UFS M-PHY with UFS host controller, the controller node should > +contain a phandle reference to UFS M-PHY node. > + > +Required properties for UFS M-PHY nodes: > +- compatible : Compatible list, contains the following controller: > + "mediatek,ufs-mphy" Needs a more specific compatible string. > +- reg : Address and length of the UFS M-PHY register set. > +- #phy-cells : This property shall be set to 0 > +- clocks : List of phandle and clock specifier pairs. > +- clock-names : List of clock input name strings sorted in the same > + order as the clocks property. "unipro-clk" and > + "mp-clk" are mandatory. > + > +Example: > + > + ufs_mphy: ufs_mphy@11fa0000 { phy@... > + compatible = "mediatek,ufs-mphy"; > + reg = <0 0x11fa0000 0 0xc000>; > + #phy-cells = <0>; > + > + clocks = <&infracfg_ao INFRACFG_AO_UNIPRO_SCK_CG>, > + <&infracfg_ao INFRACFG_AO_UFS_MP_SAP_BCLK_CG>; > + clock-names = "unipro-clk", "mp-clk"; > + }; > + > + ufshci:ufshci@11270000 { > + ... > + phys = <&ufs_mphy>; > + }; > -- > 2.18.0 >
Hi Rob, On Tue, 2019-03-12 at 21:25 +0800, Rob Herring wrote: > On Wed, Feb 27, 2019 at 03:23:09PM +0800, Stanley Chu wrote: > > Add UFS M-PHY node document for MediaTek SoC chips. > > > > Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> > > --- > > .../devicetree/bindings/phy/phy-mtk-ufs.txt | 35 +++++++++++++++++++ > > 1 file changed, 35 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > > > diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > new file mode 100644 > > index 000000000000..5fc22c7fe0bc > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > @@ -0,0 +1,35 @@ > > +MediaTek Universal Flash Storage (UFS) M-PHY binding > > +-------------------------------------------------------- > > + > > +UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro. > > +Each UFS M-PHY node should have its own node. > > + > > +To bind UFS M-PHY with UFS host controller, the controller node should > > +contain a phandle reference to UFS M-PHY node. > > + > > +Required properties for UFS M-PHY nodes: > > +- compatible : Compatible list, contains the following controller: > > + "mediatek,ufs-mphy" > > Needs a more specific compatible string. Will add it. > > > +- reg : Address and length of the UFS M-PHY register set. > > +- #phy-cells : This property shall be set to 0 > > +- clocks : List of phandle and clock specifier pairs. > > +- clock-names : List of clock input name strings sorted in the same > > + order as the clocks property. "unipro-clk" and > > + "mp-clk" are mandatory. > > + > > +Example: > > + > > + ufs_mphy: ufs_mphy@11fa0000 { > > phy@... Will fix it. > > > + compatible = "mediatek,ufs-mphy"; > > + reg = <0 0x11fa0000 0 0xc000>; > > + #phy-cells = <0>; > > + > > + clocks = <&infracfg_ao INFRACFG_AO_UNIPRO_SCK_CG>, > > + <&infracfg_ao INFRACFG_AO_UFS_MP_SAP_BCLK_CG>; > > + clock-names = "unipro-clk", "mp-clk"; > > + }; > > + > > + ufshci:ufshci@11270000 { > > + ... > > + phys = <&ufs_mphy>; > > + }; > > -- > > 2.18.0 > > Thanks, Stanley.
On Wed, 2019-02-27 at 15:23 +0800, Stanley Chu wrote: > Add UFS M-PHY node document for MediaTek SoC chips. > > Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> > --- > .../devicetree/bindings/phy/phy-mtk-ufs.txt | 35 +++++++++++++++++++ > 1 file changed, 35 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > new file mode 100644 > index 000000000000..5fc22c7fe0bc > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > @@ -0,0 +1,35 @@ > +MediaTek Universal Flash Storage (UFS) M-PHY binding > +-------------------------------------------------------- > + > +UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro. > +Each UFS M-PHY node should have its own node. > + > +To bind UFS M-PHY with UFS host controller, the controller node should > +contain a phandle reference to UFS M-PHY node. > + > +Required properties for UFS M-PHY nodes: > +- compatible : Compatible list, contains the following controller: > + "mediatek,ufs-mphy" > +- reg : Address and length of the UFS M-PHY register set. > +- #phy-cells : This property shall be set to 0 > +- clocks : List of phandle and clock specifier pairs. > +- clock-names : List of clock input name strings sorted in the same > + order as the clocks property. "unipro-clk" and > + "mp-clk" are mandatory. All names in clock-names are clock, don't need to add -clk again. Please describe shortly what these clock are used. Joe.C
Hi Rob, On Tue, 2019-03-12 at 21:25 +0800, Rob Herring wrote: > On Wed, Feb 27, 2019 at 03:23:09PM +0800, Stanley Chu wrote: > > Add UFS M-PHY node document for MediaTek SoC chips. > > > > Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> > > --- > > .../devicetree/bindings/phy/phy-mtk-ufs.txt | 35 +++++++++++++++++++ > > 1 file changed, 35 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > > > diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > new file mode 100644 > > index 000000000000..5fc22c7fe0bc > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > @@ -0,0 +1,35 @@ > > +MediaTek Universal Flash Storage (UFS) M-PHY binding > > +-------------------------------------------------------- > > + > > +UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro. > > +Each UFS M-PHY node should have its own node. > > + > > +To bind UFS M-PHY with UFS host controller, the controller node should > > +contain a phandle reference to UFS M-PHY node. > > + > > +Required properties for UFS M-PHY nodes: > > +- compatible : Compatible list, contains the following controller: > > + "mediatek,ufs-mphy" > > Needs a more specific compatible string. > > > +- reg : Address and length of the UFS M-PHY register set. > > +- #phy-cells : This property shall be set to 0 > > +- clocks : List of phandle and clock specifier pairs. > > +- clock-names : List of clock input name strings sorted in the same > > + order as the clocks property. "unipro-clk" and > > + "mp-clk" are mandatory. > > + > > +Example: > > + > > + ufs_mphy: ufs_mphy@11fa0000 { > > phy@... > > > + compatible = "mediatek,ufs-mphy"; > > + reg = <0 0x11fa0000 0 0xc000>; > > + #phy-cells = <0>; > > + > > + clocks = <&infracfg_ao INFRACFG_AO_UNIPRO_SCK_CG>, > > + <&infracfg_ao INFRACFG_AO_UFS_MP_SAP_BCLK_CG>; > > + clock-names = "unipro-clk", "mp-clk"; Question about clock name: Shall we drop "-clk" in clock names? For example, clock-names = "unipro-clk", "mp-clk"; becomes clock-names = "unipro", "mp"; ? > > + }; > > + > > + ufshci:ufshci@11270000 { > > + ... > > + phys = <&ufs_mphy>; > > + }; > > -- > > 2.18.0 > > Thanks, Stanley.
Hi Yingjoe, On Wed, 2019-03-13 at 18:21 +0800, Yingjoe Chen wrote: > On Wed, 2019-02-27 at 15:23 +0800, Stanley Chu wrote: > > Add UFS M-PHY node document for MediaTek SoC chips. > > > > Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> > > --- > > .../devicetree/bindings/phy/phy-mtk-ufs.txt | 35 +++++++++++++++++++ > > 1 file changed, 35 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > > > diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > new file mode 100644 > > index 000000000000..5fc22c7fe0bc > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > @@ -0,0 +1,35 @@ > > +MediaTek Universal Flash Storage (UFS) M-PHY binding > > +-------------------------------------------------------- > > + > > +UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro. > > +Each UFS M-PHY node should have its own node. > > + > > +To bind UFS M-PHY with UFS host controller, the controller node should > > +contain a phandle reference to UFS M-PHY node. > > + > > +Required properties for UFS M-PHY nodes: > > +- compatible : Compatible list, contains the following controller: > > + "mediatek,ufs-mphy" > > +- reg : Address and length of the UFS M-PHY register set. > > +- #phy-cells : This property shall be set to 0 > > +- clocks : List of phandle and clock specifier pairs. > > +- clock-names : List of clock input name strings sorted in the same > > + order as the clocks property. "unipro-clk" and > > + "mp-clk" are mandatory. > > All names in clock-names are clock, don't need to add -clk again. > Please describe shortly what these clock are used. > Sorry this mail is marked as [SPAM] so I did not notice this before sending the same question to Rob. This style seems suitable in phy documents but existed ufs documents already have lots of "_clk" so I am confused. Maybe I need to drop "-clk" in phy documents and use "_clk" in ufs documents? Or wait for Rob's feedback in another mail? > Joe.C > > > Thanks. Stanley.
On Wed, Mar 13, 2019 at 9:05 AM Stanley Chu <stanley.chu@mediatek.com> wrote: > > Hi Yingjoe, > > On Wed, 2019-03-13 at 18:21 +0800, Yingjoe Chen wrote: > > On Wed, 2019-02-27 at 15:23 +0800, Stanley Chu wrote: > > > Add UFS M-PHY node document for MediaTek SoC chips. > > > > > > Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> > > > --- > > > .../devicetree/bindings/phy/phy-mtk-ufs.txt | 35 +++++++++++++++++++ > > > 1 file changed, 35 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > > > > > diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > > new file mode 100644 > > > index 000000000000..5fc22c7fe0bc > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > > @@ -0,0 +1,35 @@ > > > +MediaTek Universal Flash Storage (UFS) M-PHY binding > > > +-------------------------------------------------------- > > > + > > > +UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro. > > > +Each UFS M-PHY node should have its own node. > > > + > > > +To bind UFS M-PHY with UFS host controller, the controller node should > > > +contain a phandle reference to UFS M-PHY node. > > > + > > > +Required properties for UFS M-PHY nodes: > > > +- compatible : Compatible list, contains the following controller: > > > + "mediatek,ufs-mphy" > > > +- reg : Address and length of the UFS M-PHY register set. > > > +- #phy-cells : This property shall be set to 0 > > > +- clocks : List of phandle and clock specifier pairs. > > > +- clock-names : List of clock input name strings sorted in the same > > > + order as the clocks property. "unipro-clk" and > > > + "mp-clk" are mandatory. > > > > All names in clock-names are clock, don't need to add -clk again. > > Please describe shortly what these clock are used. > > > > Sorry this mail is marked as [SPAM] so I did not notice this before > sending the same question to Rob. > > This style seems suitable in phy documents but existed ufs documents > already have lots of "_clk" so I am confused. > > Maybe I need to drop "-clk" in phy documents and use "_clk" in ufs > documents? > > Or wait for Rob's feedback in another mail? Generally, -clk or _clk is considered redundant, but maybe you need this to be consistent with already defined names? Also, there's cases like pclk or aclk and dropping 'clk' on those wouldn't make much sense. Rob
Hi Rob and Yingjoe, On Thu, 2019-03-14 at 03:52 +0800, Rob Herring wrote: > On Wed, Mar 13, 2019 at 9:05 AM Stanley Chu <stanley.chu@mediatek.com> wrote: > > > > Hi Yingjoe, > > > > On Wed, 2019-03-13 at 18:21 +0800, Yingjoe Chen wrote: > > > On Wed, 2019-02-27 at 15:23 +0800, Stanley Chu wrote: > > > > Add UFS M-PHY node document for MediaTek SoC chips. > > > > > > > > Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> > > > > --- > > > > .../devicetree/bindings/phy/phy-mtk-ufs.txt | 35 +++++++++++++++++++ > > > > 1 file changed, 35 insertions(+) > > > > create mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > > > > > > > diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > > > new file mode 100644 > > > > index 000000000000..5fc22c7fe0bc > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt > > > > @@ -0,0 +1,35 @@ > > > > +MediaTek Universal Flash Storage (UFS) M-PHY binding > > > > +-------------------------------------------------------- > > > > + > > > > +UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro. > > > > +Each UFS M-PHY node should have its own node. > > > > + > > > > +To bind UFS M-PHY with UFS host controller, the controller node should > > > > +contain a phandle reference to UFS M-PHY node. > > > > + > > > > +Required properties for UFS M-PHY nodes: > > > > +- compatible : Compatible list, contains the following controller: > > > > + "mediatek,ufs-mphy" > > > > +- reg : Address and length of the UFS M-PHY register set. > > > > +- #phy-cells : This property shall be set to 0 > > > > +- clocks : List of phandle and clock specifier pairs. > > > > +- clock-names : List of clock input name strings sorted in the same > > > > + order as the clocks property. "unipro-clk" and > > > > + "mp-clk" are mandatory. > > > > > > All names in clock-names are clock, don't need to add -clk again. > > > Please describe shortly what these clock are used. Will add it. > > > > > > > Sorry this mail is marked as [SPAM] so I did not notice this before > > sending the same question to Rob. > > > > This style seems suitable in phy documents but existed ufs documents > > already have lots of "_clk" so I am confused. > > > > Maybe I need to drop "-clk" in phy documents and use "_clk" in ufs > > documents? > > > > Or wait for Rob's feedback in another mail? > > Generally, -clk or _clk is considered redundant, but maybe you need > this to be consistent with already defined names? > > Also, there's cases like pclk or aclk and dropping 'clk' on those > wouldn't make much sense. > Thanks so much for clear explanation. I will try to fix redundant clock names in next version. > Rob Thanks, Stanley > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt new file mode 100644 index 000000000000..5fc22c7fe0bc --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt @@ -0,0 +1,35 @@ +MediaTek Universal Flash Storage (UFS) M-PHY binding +-------------------------------------------------------- + +UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro. +Each UFS M-PHY node should have its own node. + +To bind UFS M-PHY with UFS host controller, the controller node should +contain a phandle reference to UFS M-PHY node. + +Required properties for UFS M-PHY nodes: +- compatible : Compatible list, contains the following controller: + "mediatek,ufs-mphy" +- reg : Address and length of the UFS M-PHY register set. +- #phy-cells : This property shall be set to 0 +- clocks : List of phandle and clock specifier pairs. +- clock-names : List of clock input name strings sorted in the same + order as the clocks property. "unipro-clk" and + "mp-clk" are mandatory. + +Example: + + ufs_mphy: ufs_mphy@11fa0000 { + compatible = "mediatek,ufs-mphy"; + reg = <0 0x11fa0000 0 0xc000>; + #phy-cells = <0>; + + clocks = <&infracfg_ao INFRACFG_AO_UNIPRO_SCK_CG>, + <&infracfg_ao INFRACFG_AO_UFS_MP_SAP_BCLK_CG>; + clock-names = "unipro-clk", "mp-clk"; + }; + + ufshci:ufshci@11270000 { + ... + phys = <&ufs_mphy>; + };
Add UFS M-PHY node document for MediaTek SoC chips. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> --- .../devicetree/bindings/phy/phy-mtk-ufs.txt | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt