From patchwork Sun Aug 21 15:45:40 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aisheng Dong X-Patchwork-Id: 1083482 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7LFXis4025915 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Sun, 21 Aug 2011 15:34:05 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QvA1h-00056l-78; Sun, 21 Aug 2011 15:33:29 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QvA1g-0003PW-Of; Sun, 21 Aug 2011 15:33:28 +0000 Received: from va3ehsobe002.messaging.microsoft.com ([216.32.180.12] helo=VA3EHSOBE002.bigfish.com) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QvA1d-0003PD-NG for linux-arm-kernel@lists.infradead.org; Sun, 21 Aug 2011 15:33:26 +0000 Received: from mail136-va3-R.bigfish.com (10.7.14.236) by VA3EHSOBE002.bigfish.com (10.7.40.22) with Microsoft SMTP Server id 14.1.225.22; Sun, 21 Aug 2011 15:33:21 +0000 Received: from mail136-va3 (localhost.localdomain [127.0.0.1]) by mail136-va3-R.bigfish.com (Postfix) with ESMTP id 2E851F383D2; Sun, 21 Aug 2011 15:33:21 +0000 (UTC) X-SpamScore: 3 X-BigFish: VS3(zzzz1202h1082kzz8275bhz2dh2a8h668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail136-va3 (localhost.localdomain [127.0.0.1]) by mail136-va3 (MessageSwitch) id 1313940800716250_30613; Sun, 21 Aug 2011 15:33:20 +0000 (UTC) Received: from VA3EHSMHS006.bigfish.com (unknown [10.7.14.244]) by mail136-va3.bigfish.com (Postfix) with ESMTP id 75E233F004B; Sun, 21 Aug 2011 15:33:20 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS006.bigfish.com (10.7.99.16) with Microsoft SMTP Server (TLS) id 14.1.225.22; Sun, 21 Aug 2011 15:33:19 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.323.2; Sun, 21 Aug 2011 10:33:18 -0500 Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p7LFXFH0029814; Sun, 21 Aug 2011 10:33:16 -0500 (CDT) From: Dong Aisheng To: Subject: [PATCH 1/1] ASoC: mxs-saif: clear clk gate first before register setting Date: Sun, 21 Aug 2011 23:45:40 +0800 Message-ID: <1313941540-20393-1-git-send-email-b29396@freescale.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110821_113325_879964_2B850D12 X-CRM114-Status: GOOD ( 15.39 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.180.12 listed in list.dnswl.org] Cc: s.hauer@pengutronix.de, broonie@opensource.wolfsonmicro.com, lrg@ti.com, linux-arm-kernel@lists.infradead.org, w.sang@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Sun, 21 Aug 2011 15:34:05 +0000 (UTC) Saif needs clear clk gate first before writing registers or the write will not success. The original xx_get_mclk function clear clk gate after mclk setting that may cause the former mclk setting unwork, then the real output mclk maybe inaccurate. Placing the clear before setting mclk to avoid such an issue. We also have to clear clk gate in startup instead of in prepare function. Signed-off-by: Dong Aisheng Cc: Mark Brown Cc: Liam Girdwood Cc: Sascha Hauer Cc: Wolfram Sang Acked-by: Liam Girdwood --- sound/soc/mxs/mxs-saif.c | 22 ++++++++++++---------- 1 files changed, 12 insertions(+), 10 deletions(-) diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c index 0b3adae..530017f 100644 --- a/sound/soc/mxs/mxs-saif.c +++ b/sound/soc/mxs/mxs-saif.c @@ -187,16 +187,20 @@ int mxs_saif_get_mclk(unsigned int saif_id, unsigned int mclk, if (!saif) return -EINVAL; + /* Clear Reset */ + __raw_writel(BM_SAIF_CTRL_SFTRST, + saif->base + SAIF_CTRL + MXS_CLR_ADDR); + + /* FIXME: need clear clk gate for register r/w */ + __raw_writel(BM_SAIF_CTRL_CLKGATE, + saif->base + SAIF_CTRL + MXS_CLR_ADDR); + stat = __raw_readl(saif->base + SAIF_STAT); if (stat & BM_SAIF_STAT_BUSY) { dev_err(saif->dev, "error: busy\n"); return -EBUSY; } - /* Clear Reset */ - __raw_writel(BM_SAIF_CTRL_SFTRST, - saif->base + SAIF_CTRL + MXS_CLR_ADDR); - saif->mclk_in_use = 1; ret = mxs_saif_set_clk(saif, mclk, rate); if (ret) @@ -207,8 +211,6 @@ int mxs_saif_get_mclk(unsigned int saif_id, unsigned int mclk, return ret; /* enable MCLK output */ - __raw_writel(BM_SAIF_CTRL_CLKGATE, - saif->base + SAIF_CTRL + MXS_CLR_ADDR); __raw_writel(BM_SAIF_CTRL_RUN, saif->base + SAIF_CTRL + MXS_SET_ADDR); @@ -303,6 +305,10 @@ static int mxs_saif_startup(struct snd_pcm_substream *substream, __raw_writel(BM_SAIF_CTRL_SFTRST, saif->base + SAIF_CTRL + MXS_CLR_ADDR); + /* clear clock gate */ + __raw_writel(BM_SAIF_CTRL_CLKGATE, + saif->base + SAIF_CTRL + MXS_CLR_ADDR); + return 0; } @@ -379,10 +385,6 @@ static int mxs_saif_prepare(struct snd_pcm_substream *substream, { struct mxs_saif *saif = snd_soc_dai_get_drvdata(cpu_dai); - /* clear clock gate */ - __raw_writel(BM_SAIF_CTRL_CLKGATE, - saif->base + SAIF_CTRL + MXS_CLR_ADDR); - /* enable FIFO error irqs */ __raw_writel(BM_SAIF_CTRL_FIFO_ERROR_IRQ_EN, saif->base + SAIF_CTRL + MXS_SET_ADDR);