| Message ID | 20190306232345.23052-4-laurent.pinchart+renesas@ideasonboard.com (mailing list archive) |
|---|---|
| State | New |
| Delegated to: | Kieran Bingham |
| Headers | show |
| Series | R-Car DU: LVDS dual-link mode support | expand |
Hi Laurent, On 06/03/2019 23:23, Laurent Pinchart wrote: > From: Stefan Agner <stefan@agner.ch> > > The DRM bus flags convey additional information on pixel data on > the bus. All current available bus flags might be of interest for > a bridge. Remove the sampling_edge field and use bus_flags. > > In the case at hand a dumb VGA bridge needs a specific data enable > polarity (DRM_BUS_FLAG_DE_LOW). > > Signed-off-by: Stefan Agner <stefan@agner.ch> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Trivial but, should you have a +renesas ^ there? > Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> > --- > drivers/gpu/drm/bridge/dumb-vga-dac.c | 6 +++--- > include/drm/drm_bridge.h | 12 +++++------- > 2 files changed, 8 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/dumb-vga-dac.c b/drivers/gpu/drm/bridge/dumb-vga-dac.c > index 94ed450e308d..e64736c39a9f 100644 > --- a/drivers/gpu/drm/bridge/dumb-vga-dac.c > +++ b/drivers/gpu/drm/bridge/dumb-vga-dac.c > @@ -234,7 +234,7 @@ static int dumb_vga_remove(struct platform_device *pdev) > */ > static const struct drm_bridge_timings default_dac_timings = { > /* Timing specifications, datasheet page 7 */ > - .sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, > + .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, > .setup_time_ps = 500, > .hold_time_ps = 1500, > }; > @@ -245,7 +245,7 @@ static const struct drm_bridge_timings default_dac_timings = { > */ > static const struct drm_bridge_timings ti_ths8134_dac_timings = { > /* From timing diagram, datasheet page 9 */ > - .sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, > + .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, > /* From datasheet, page 12 */ > .setup_time_ps = 3000, > /* I guess this means latched input */ > @@ -258,7 +258,7 @@ static const struct drm_bridge_timings ti_ths8134_dac_timings = { > */ > static const struct drm_bridge_timings ti_ths8135_dac_timings = { > /* From timing diagram, datasheet page 14 */ > - .sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, > + .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, > /* From datasheet, page 16 */ > .setup_time_ps = 2000, > .hold_time_ps = 500, > diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h > index 5e5129206f40..d4428913a4e1 100644 > --- a/include/drm/drm_bridge.h > +++ b/include/drm/drm_bridge.h > @@ -244,15 +244,13 @@ struct drm_bridge_funcs { > */ > struct drm_bridge_timings { > /** > - * @sampling_edge: > + * @input_bus_flags: > * > - * Tells whether the bridge samples the digital input signals from the > - * display engine on the positive or negative edge of the clock. This > - * should use the DRM_BUS_FLAG_PIXDATA_SAMPLE_[POS|NEG]EDGE and > - * DRM_BUS_FLAG_SYNC_SAMPLE_[POS|NEG]EDGE bitwise flags from the DRM > - * connector (bit 2, 3, 6 and 7 valid). > + * Tells what additional settings for the pixel data on the bus > + * this bridge requires (like pixel signal polarity). See also > + * &drm_display_info->bus_flags. > */ > - u32 sampling_edge; > + u32 input_bus_flags; > /** > * @setup_time_ps: > * >
diff --git a/drivers/gpu/drm/bridge/dumb-vga-dac.c b/drivers/gpu/drm/bridge/dumb-vga-dac.c index 94ed450e308d..e64736c39a9f 100644 --- a/drivers/gpu/drm/bridge/dumb-vga-dac.c +++ b/drivers/gpu/drm/bridge/dumb-vga-dac.c @@ -234,7 +234,7 @@ static int dumb_vga_remove(struct platform_device *pdev) */ static const struct drm_bridge_timings default_dac_timings = { /* Timing specifications, datasheet page 7 */ - .sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, + .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, .setup_time_ps = 500, .hold_time_ps = 1500, }; @@ -245,7 +245,7 @@ static const struct drm_bridge_timings default_dac_timings = { */ static const struct drm_bridge_timings ti_ths8134_dac_timings = { /* From timing diagram, datasheet page 9 */ - .sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, + .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, /* From datasheet, page 12 */ .setup_time_ps = 3000, /* I guess this means latched input */ @@ -258,7 +258,7 @@ static const struct drm_bridge_timings ti_ths8134_dac_timings = { */ static const struct drm_bridge_timings ti_ths8135_dac_timings = { /* From timing diagram, datasheet page 14 */ - .sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, + .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, /* From datasheet, page 16 */ .setup_time_ps = 2000, .hold_time_ps = 500, diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h index 5e5129206f40..d4428913a4e1 100644 --- a/include/drm/drm_bridge.h +++ b/include/drm/drm_bridge.h @@ -244,15 +244,13 @@ struct drm_bridge_funcs { */ struct drm_bridge_timings { /** - * @sampling_edge: + * @input_bus_flags: * - * Tells whether the bridge samples the digital input signals from the - * display engine on the positive or negative edge of the clock. This - * should use the DRM_BUS_FLAG_PIXDATA_SAMPLE_[POS|NEG]EDGE and - * DRM_BUS_FLAG_SYNC_SAMPLE_[POS|NEG]EDGE bitwise flags from the DRM - * connector (bit 2, 3, 6 and 7 valid). + * Tells what additional settings for the pixel data on the bus + * this bridge requires (like pixel signal polarity). See also + * &drm_display_info->bus_flags. */ - u32 sampling_edge; + u32 input_bus_flags; /** * @setup_time_ps: *