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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id a22sm3381642wmj.35.2019.03.06.16.04.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 16:04:56 -0800 (PST) From: marek.vasut@gmail.com To: linux-ide@vger.kernel.org, linux-nvme@lists.infradead.org Cc: Marek Vasut , Christoph Hellwig , Geert Uytterhoeven , Jens Axboe , Jens Axboe , Keith Busch , Robin Murphy , Sagi Grimberg , Wolfram Sang , linux-renesas-soc@vger.kernel.org Subject: [PATCH 2/2] [RFC] nvme-pci: Respect bus DMA constraints Date: Thu, 7 Mar 2019 01:04:40 +0100 Message-Id: <20190307000440.8708-2-marek.vasut@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190307000440.8708-1-marek.vasut@gmail.com> References: <20190307000440.8708-1-marek.vasut@gmail.com> MIME-Version: 1.0 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Marek Vasut Since commit 6c2fb2ea7636 ("of/device: Set bus DMA mask as appropriate"), the upstream bus can constraint device DMA range. Respect that constraint and do not change the device DMA masks if they were already set. This is applicable e.g. on systems where the PCIe controller cannot expose the full address space range. Such a system may have a 64bit CPU with DRAM mapped both below and above the 32bit address space, yet the PCIe devices can not perform DMA directly to/from the DRAM range above the 32bit limit. Hence, for such setup to work, all the buffers must exist below the 32bit limit. Signed-off-by: Marek Vasut Cc: Christoph Hellwig Cc: Geert Uytterhoeven Cc: Jens Axboe Cc: Jens Axboe Cc: Keith Busch Cc: Robin Murphy Cc: Sagi Grimberg Cc: Wolfram Sang Cc: linux-renesas-soc@vger.kernel.org To: linux-ide@vger.kernel.org To: linux-nvme@lists.infradead.org --- drivers/nvme/host/pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index 92bad1c810ac..8ec873fb86b1 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -2323,7 +2323,8 @@ static int nvme_pci_enable(struct nvme_dev *dev) pci_set_master(pdev); - if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) && + if (!dev->dev->coherent_dma_mask && + dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) && dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32))) goto disable;