From patchwork Fri Mar 8 16:47:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 10845141 X-Patchwork-Delegate: viresh.linux@gmail.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 80FA81803 for ; Fri, 8 Mar 2019 16:47:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6A2FF2E93D for ; Fri, 8 Mar 2019 16:47:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5E0662F4FB; Fri, 8 Mar 2019 16:47:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DFAE62E93D for ; Fri, 8 Mar 2019 16:47:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726534AbfCHQrc (ORCPT ); Fri, 8 Mar 2019 11:47:32 -0500 Received: from relay5-d.mail.gandi.net ([217.70.183.197]:39989 "EHLO relay5-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726420AbfCHQrb (ORCPT ); Fri, 8 Mar 2019 11:47:31 -0500 X-Originating-IP: 109.213.209.9 Received: from localhost (alyon-652-1-66-9.w109-213.abo.wanadoo.fr [109.213.209.9]) (Authenticated sender: gregory.clement@bootlin.com) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id 33BDF1C0003; Fri, 8 Mar 2019 16:47:26 +0000 (UTC) From: Gregory CLEMENT To: "Rafael J. Wysocki" , Viresh Kumar , linux-pm@vger.kernel.org Cc: Christian Neubert , Ilias Apalodimas , Vincent Guittot , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory CLEMENT , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Antoine Tenart , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Maxime Chevallier , stable@vger.kernel.org Subject: [PATCH 1/2] cpufreq: armada-37xx: fix clock parenting Date: Fri, 8 Mar 2019 17:47:09 +0100 Message-Id: <20190308164710.10597-2-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190308164710.10597-1-gregory.clement@bootlin.com> References: <20190308164710.10597-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Christian Neubert The clock parenting was not setup properly when DVFS was enabled. It was expected that the same clock source was used with and without DVFS which was not the case. This patch fixes this issue, allowing to make the cpufreq support work when the CPU clock source are not the default ones. Fixes: 92ce45fb875d ("cpufreq: Add DVFS support for Armada 37xx") Cc: [gregory: extract from a larger patch, modify comments and commit log] Signed-off-by: Christian Neubert Signed-off-by: Gregory CLEMENT --- drivers/cpufreq/armada-37xx-cpufreq.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/cpufreq/armada-37xx-cpufreq.c b/drivers/cpufreq/armada-37xx-cpufreq.c index 75491fc841a6..ad4463e4266e 100644 --- a/drivers/cpufreq/armada-37xx-cpufreq.c +++ b/drivers/cpufreq/armada-37xx-cpufreq.c @@ -162,11 +162,25 @@ static void __init armada37xx_cpufreq_dvfs_setup(struct regmap *base, } /* - * Set cpu clock source, for all the level we keep the same - * clock source that the one already configured. For this one - * we need to use the clock framework + * Set CPU clock source, for all the level we keep the same + * clock source that the one already configured with DVS + * disabled. For this one we need to use the clock framework */ parent = clk_get_parent(clk); + + /* + * Unset parent clock to force the clock framework setting again + * the clock parent + */ + clk_set_parent(clk, NULL); + + /* + * For the Armada 37xx CPU clocks, setting the parent will + * actually configure the parent when DVFS is enabled. At + * hardware level it will be a different register from the one + * read when doing clk_get_parent that will be set with + * clk_set_parent. + */ clk_set_parent(clk, parent); }