diff mbox series

[V2,06/10] mmc: cqhci: allow hosts to specify dcmd cmd timing parameter

Message ID 1552327359-8036-6-git-send-email-skomatineni@nvidia.com (mailing list archive)
State New, archived
Headers show
Series [V2,01/10] mmc: tegra: fix ddr signaling for non-ddr modes | expand

Commit Message

Sowjanya Komatineni March 11, 2019, 6:02 p.m. UTC 
This patch adds get_dcmd_cmd_timing interface to cqhci_host_ops to
allow hosts to specify CMD_TIMING bit of the DCMD task descriptor
command parameter.

This helps host driver to control whether the command can be issued
during data transfer or only during idle time.

Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/mmc/host/cqhci.c | 2 ++
 drivers/mmc/host/cqhci.h | 2 ++
 2 files changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/drivers/mmc/host/cqhci.c b/drivers/mmc/host/cqhci.c
index a8af682a9182..9a02f9c82aeb 100644
--- a/drivers/mmc/host/cqhci.c
+++ b/drivers/mmc/host/cqhci.c
@@ -528,6 +528,8 @@  static void cqhci_prep_dcmd_desc(struct mmc_host *mmc,
 		}
 	}
 
+	if (cq_host->ops->get_dcmd_cmd_timing)
+		timing = cq_host->ops->get_dcmd_cmd_timing(mmc, mrq);
 	task_desc = (__le64 __force *)get_desc(cq_host, cq_host->dcmd_slot);
 	memset(task_desc, 0, cq_host->task_desc_len);
 	data |= (CQHCI_VALID(1) |
diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h
index 9e68286a07b4..981158da3326 100644
--- a/drivers/mmc/host/cqhci.h
+++ b/drivers/mmc/host/cqhci.h
@@ -210,6 +210,8 @@  struct cqhci_host_ops {
 	u32 (*read_l)(struct cqhci_host *host, int reg);
 	void (*enable)(struct mmc_host *mmc);
 	void (*disable)(struct mmc_host *mmc, bool recovery);
+	u8 (*get_dcmd_cmd_timing)(struct mmc_host *mmc,
+				  struct mmc_request *mrq);
 };
 
 static inline void cqhci_writel(struct cqhci_host *host, u32 val, int reg)