| Message ID | 1552357127-1283-1-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
|---|---|
| State | Mainlined, archived |
| Commit | 8677858da6b9d1afc49b5ba8bfefea92e9416cd2 |
| Headers | show |
| Series | [V5,1/4] dt-bindings: memory-controllers: freescale: add MMDC binding doc | expand |
On Tue, 12 Mar 2019 02:24:08 +0000, Anson Huang wrote: > Freescale MMDC (Multi Mode DDR Controller) driver is supported > since i.MX6Q, but not yet documented, this patch adds binding > doc for MMDC module driver. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > Changes since V4: > - update mmdc1 example. > --- > .../bindings/memory-controllers/fsl/mmdc.txt | 35 ++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt > Reviewed-by: Rob Herring <robh@kernel.org>
On Tue, Mar 12, 2019 at 02:24:08AM +0000, Anson Huang wrote: > Freescale MMDC (Multi Mode DDR Controller) driver is supported > since i.MX6Q, but not yet documented, this patch adds binding > doc for MMDC module driver. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Applied all, thanks.
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt b/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt new file mode 100644 index 0000000..bcc36c5 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt @@ -0,0 +1,35 @@ +Freescale Multi Mode DDR controller (MMDC) + +Required properties : +- compatible : should be one of following: + for i.MX6Q/i.MX6DL: + - "fsl,imx6q-mmdc"; + for i.MX6QP: + - "fsl,imx6qp-mmdc", "fsl,imx6q-mmdc"; + for i.MX6SL: + - "fsl,imx6sl-mmdc", "fsl,imx6q-mmdc"; + for i.MX6SLL: + - "fsl,imx6sll-mmdc", "fsl,imx6q-mmdc"; + for i.MX6SX: + - "fsl,imx6sx-mmdc", "fsl,imx6q-mmdc"; + for i.MX6UL/i.MX6ULL/i.MX6ULZ: + - "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc"; + for i.MX7ULP: + - "fsl,imx7ulp-mmdc", "fsl,imx6q-mmdc"; +- reg : address and size of MMDC DDR controller registers + +Optional properties : +- clocks : the clock provided by the SoC to access the MMDC registers + +Example : + mmdc0: memory-controller@21b0000 { /* MMDC0 */ + compatible = "fsl,imx6q-mmdc"; + reg = <0x021b0000 0x4000>; + clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>; + }; + + mmdc1: memory-controller@21b4000 { /* MMDC1 */ + compatible = "fsl,imx6q-mmdc"; + reg = <0x021b4000 0x4000>; + status = "disabled"; + };
Freescale MMDC (Multi Mode DDR Controller) driver is supported since i.MX6Q, but not yet documented, this patch adds binding doc for MMDC module driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- Changes since V4: - update mmdc1 example. --- .../bindings/memory-controllers/fsl/mmdc.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt