@@ -7003,6 +7003,7 @@ lpfc_get_cfgparam(struct lpfc_hba *phba)
if (phba->sli_rev != LPFC_SLI_REV4) {
/* NVME only supported on SLI4 */
phba->nvmet_support = 0;
+ phba->cfg_nvmet_mrq = 0;
phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
phba->cfg_enable_bbcr = 0;
phba->cfg_xri_rebalancing = 0;
@@ -7104,7 +7105,7 @@ lpfc_nvme_mod_param_dep(struct lpfc_hba *phba)
} else {
/* Not NVME Target mode. Turn off Target parameters. */
phba->nvmet_support = 0;
- phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_OFF;
+ phba->cfg_nvmet_mrq = 0;
phba->cfg_nvmet_fb_size = 0;
}
}
@@ -8596,9 +8596,9 @@ lpfc_sli4_queue_verify(struct lpfc_hba *phba)
if (phba->nvmet_support) {
if (phba->cfg_irq_chann < phba->cfg_nvmet_mrq)
phba->cfg_nvmet_mrq = phba->cfg_irq_chann;
+ if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
+ phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
}
- if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
- phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
"2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n",
@@ -10729,7 +10729,7 @@ lpfc_sli4_enable_msix(struct lpfc_hba *phba)
phba->cfg_irq_chann, vectors);
if (phba->cfg_irq_chann > vectors)
phba->cfg_irq_chann = vectors;
- if (phba->cfg_nvmet_mrq > vectors)
+ if (phba->nvmet_support && (phba->cfg_nvmet_mrq > vectors))
phba->cfg_nvmet_mrq = vectors;
}
@@ -11286,7 +11286,7 @@ lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
!phba->nvme_support) {
phba->nvme_support = 0;
phba->nvmet_support = 0;
- phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_OFF;
+ phba->cfg_nvmet_mrq = 0;
lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
"6101 Disabling NVME support: "
"Not supported by firmware: %d %d\n",
@@ -27,7 +27,6 @@
#define LPFC_NVMET_RQE_DEF_COUNT 2048
#define LPFC_NVMET_SUCCESS_LEN 12
-#define LPFC_NVMET_MRQ_OFF 0xffff
#define LPFC_NVMET_MRQ_AUTO 0
#define LPFC_NVMET_MRQ_MAX 16