diff mbox series

[1/5] drm/i915: Mark up vGPU support for full-ppgtt

Message ID 20190314223839.28258-1-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show
Series [1/5] drm/i915: Mark up vGPU support for full-ppgtt | expand

Commit Message

Chris Wilson March 14, 2019, 10:38 p.m. UTC
For compatibility reasons, we only care if the vGPU host provides
support for full-ppgtt. This is independent of the addressable memory
size, so remove the conflation of 48b from the capability name.

Based on a patch by Bob Paauwe <bob.j.paauwe@intel.com>

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
---
 drivers/gpu/drm/i915/gvt/vgpu.c    | 2 +-
 drivers/gpu/drm/i915/i915_drv.c    | 2 +-
 drivers/gpu/drm/i915/i915_pvinfo.h | 2 +-
 drivers/gpu/drm/i915/i915_vgpu.c   | 4 ++--
 drivers/gpu/drm/i915/i915_vgpu.h   | 2 +-
 5 files changed, 6 insertions(+), 6 deletions(-)

Comments

Rodrigo Vivi March 14, 2019, 10:55 p.m. UTC | #1
On Thu, Mar 14, 2019 at 10:38:35PM +0000, Chris Wilson wrote:
> For compatibility reasons, we only care if the vGPU host provides
> support for full-ppgtt. This is independent of the addressable memory
> size, so remove the conflation of 48b from the capability name.
> 
> Based on a patch by Bob Paauwe <bob.j.paauwe@intel.com>
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Bob Paauwe <bob.j.paauwe@intel.com>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Cc: Zhi Wang <zhi.a.wang@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/gvt/vgpu.c    | 2 +-
>  drivers/gpu/drm/i915/i915_drv.c    | 2 +-
>  drivers/gpu/drm/i915/i915_pvinfo.h | 2 +-
>  drivers/gpu/drm/i915/i915_vgpu.c   | 4 ++--
>  drivers/gpu/drm/i915/i915_vgpu.h   | 2 +-
>  5 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
> index 720e2b10adaa..314e40121e47 100644
> --- a/drivers/gpu/drm/i915/gvt/vgpu.c
> +++ b/drivers/gpu/drm/i915/gvt/vgpu.c
> @@ -44,7 +44,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu)
>  	vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0;
>  	vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
>  
> -	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_48BIT_PPGTT;
> +	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_PPGTT;
>  	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
>  	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT;
>  
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 0d743907e7bc..ad695cdc0487 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1494,7 +1494,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
>  
>  	if (HAS_PPGTT(dev_priv)) {
>  		if (intel_vgpu_active(dev_priv) &&
> -		    !intel_vgpu_has_full_48bit_ppgtt(dev_priv)) {
> +		    !intel_vgpu_has_full_ppgtt(dev_priv)) {
>  			i915_report_error(dev_priv,
>  					  "incompatible vGPU found, support for isolated ppGTT required\n");
>  			return -ENXIO;
> diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i915_pvinfo.h
> index eeaa3d506d95..969e514916ab 100644
> --- a/drivers/gpu/drm/i915/i915_pvinfo.h
> +++ b/drivers/gpu/drm/i915/i915_pvinfo.h
> @@ -52,7 +52,7 @@ enum vgt_g2v_type {
>  /*
>   * VGT capabilities type
>   */
> -#define VGT_CAPS_FULL_48BIT_PPGTT	BIT(2)
> +#define VGT_CAPS_FULL_PPGTT		BIT(2)
>  #define VGT_CAPS_HWSP_EMULATION		BIT(3)
>  #define VGT_CAPS_HUGE_GTT		BIT(4)
>  
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
> index 869cf4a3b6de..3b2d83f704e3 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.c
> +++ b/drivers/gpu/drm/i915/i915_vgpu.c
> @@ -81,9 +81,9 @@ void i915_check_vgpu(struct drm_i915_private *dev_priv)
>  	DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
>  }
>  
> -bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv)
> +bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)
>  {
> -	return dev_priv->vgpu.caps & VGT_CAPS_FULL_48BIT_PPGTT;
> +	return dev_priv->vgpu.caps & VGT_CAPS_FULL_PPGTT;
>  }
>  
>  struct _balloon_info_ {
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
> index 551acc390046..ebe1b7bced98 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.h
> +++ b/drivers/gpu/drm/i915/i915_vgpu.h
> @@ -28,7 +28,7 @@
>  
>  void i915_check_vgpu(struct drm_i915_private *dev_priv);
>  
> -bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv);
> +bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv);
>  
>  static inline bool
>  intel_vgpu_has_hwsp_emulation(struct drm_i915_private *dev_priv)
> -- 
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Zhenyu Wang March 15, 2019, 2:15 a.m. UTC | #2
On 2019.03.14 22:38:35 +0000, Chris Wilson wrote:
> For compatibility reasons, we only care if the vGPU host provides
> support for full-ppgtt. This is independent of the addressable memory
> size, so remove the conflation of 48b from the capability name.
> 
> Based on a patch by Bob Paauwe <bob.j.paauwe@intel.com>
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Bob Paauwe <bob.j.paauwe@intel.com>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Cc: Zhi Wang <zhi.a.wang@intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/vgpu.c    | 2 +-
>  drivers/gpu/drm/i915/i915_drv.c    | 2 +-
>  drivers/gpu/drm/i915/i915_pvinfo.h | 2 +-
>  drivers/gpu/drm/i915/i915_vgpu.c   | 4 ++--
>  drivers/gpu/drm/i915/i915_vgpu.h   | 2 +-
>  5 files changed, 6 insertions(+), 6 deletions(-)
>

Looks good to me.

Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>


> diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
> index 720e2b10adaa..314e40121e47 100644
> --- a/drivers/gpu/drm/i915/gvt/vgpu.c
> +++ b/drivers/gpu/drm/i915/gvt/vgpu.c
> @@ -44,7 +44,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu)
>  	vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0;
>  	vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
>  
> -	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_48BIT_PPGTT;
> +	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_PPGTT;
>  	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
>  	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT;
>  
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 0d743907e7bc..ad695cdc0487 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1494,7 +1494,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
>  
>  	if (HAS_PPGTT(dev_priv)) {
>  		if (intel_vgpu_active(dev_priv) &&
> -		    !intel_vgpu_has_full_48bit_ppgtt(dev_priv)) {
> +		    !intel_vgpu_has_full_ppgtt(dev_priv)) {
>  			i915_report_error(dev_priv,
>  					  "incompatible vGPU found, support for isolated ppGTT required\n");
>  			return -ENXIO;
> diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i915_pvinfo.h
> index eeaa3d506d95..969e514916ab 100644
> --- a/drivers/gpu/drm/i915/i915_pvinfo.h
> +++ b/drivers/gpu/drm/i915/i915_pvinfo.h
> @@ -52,7 +52,7 @@ enum vgt_g2v_type {
>  /*
>   * VGT capabilities type
>   */
> -#define VGT_CAPS_FULL_48BIT_PPGTT	BIT(2)
> +#define VGT_CAPS_FULL_PPGTT		BIT(2)
>  #define VGT_CAPS_HWSP_EMULATION		BIT(3)
>  #define VGT_CAPS_HUGE_GTT		BIT(4)
>  
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
> index 869cf4a3b6de..3b2d83f704e3 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.c
> +++ b/drivers/gpu/drm/i915/i915_vgpu.c
> @@ -81,9 +81,9 @@ void i915_check_vgpu(struct drm_i915_private *dev_priv)
>  	DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
>  }
>  
> -bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv)
> +bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)
>  {
> -	return dev_priv->vgpu.caps & VGT_CAPS_FULL_48BIT_PPGTT;
> +	return dev_priv->vgpu.caps & VGT_CAPS_FULL_PPGTT;
>  }
>  
>  struct _balloon_info_ {
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
> index 551acc390046..ebe1b7bced98 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.h
> +++ b/drivers/gpu/drm/i915/i915_vgpu.h
> @@ -28,7 +28,7 @@
>  
>  void i915_check_vgpu(struct drm_i915_private *dev_priv);
>  
> -bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv);
> +bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv);
>  
>  static inline bool
>  intel_vgpu_has_hwsp_emulation(struct drm_i915_private *dev_priv)
> -- 
> 2.20.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
index 720e2b10adaa..314e40121e47 100644
--- a/drivers/gpu/drm/i915/gvt/vgpu.c
+++ b/drivers/gpu/drm/i915/gvt/vgpu.c
@@ -44,7 +44,7 @@  void populate_pvinfo_page(struct intel_vgpu *vgpu)
 	vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0;
 	vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
 
-	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_48BIT_PPGTT;
+	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_PPGTT;
 	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
 	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT;
 
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 0d743907e7bc..ad695cdc0487 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1494,7 +1494,7 @@  static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
 
 	if (HAS_PPGTT(dev_priv)) {
 		if (intel_vgpu_active(dev_priv) &&
-		    !intel_vgpu_has_full_48bit_ppgtt(dev_priv)) {
+		    !intel_vgpu_has_full_ppgtt(dev_priv)) {
 			i915_report_error(dev_priv,
 					  "incompatible vGPU found, support for isolated ppGTT required\n");
 			return -ENXIO;
diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i915_pvinfo.h
index eeaa3d506d95..969e514916ab 100644
--- a/drivers/gpu/drm/i915/i915_pvinfo.h
+++ b/drivers/gpu/drm/i915/i915_pvinfo.h
@@ -52,7 +52,7 @@  enum vgt_g2v_type {
 /*
  * VGT capabilities type
  */
-#define VGT_CAPS_FULL_48BIT_PPGTT	BIT(2)
+#define VGT_CAPS_FULL_PPGTT		BIT(2)
 #define VGT_CAPS_HWSP_EMULATION		BIT(3)
 #define VGT_CAPS_HUGE_GTT		BIT(4)
 
diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
index 869cf4a3b6de..3b2d83f704e3 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.c
+++ b/drivers/gpu/drm/i915/i915_vgpu.c
@@ -81,9 +81,9 @@  void i915_check_vgpu(struct drm_i915_private *dev_priv)
 	DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
 }
 
-bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv)
+bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)
 {
-	return dev_priv->vgpu.caps & VGT_CAPS_FULL_48BIT_PPGTT;
+	return dev_priv->vgpu.caps & VGT_CAPS_FULL_PPGTT;
 }
 
 struct _balloon_info_ {
diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
index 551acc390046..ebe1b7bced98 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.h
+++ b/drivers/gpu/drm/i915/i915_vgpu.h
@@ -28,7 +28,7 @@ 
 
 void i915_check_vgpu(struct drm_i915_private *dev_priv);
 
-bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv);
+bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv);
 
 static inline bool
 intel_vgpu_has_hwsp_emulation(struct drm_i915_private *dev_priv)