diff mbox series

[v6,11/16] drm/i915/icl: Enable Plane Degamma

Message ID 1552985064-11974-12-git-send-email-uma.shankar@intel.com (mailing list archive)
State New, archived
Headers show
Series Add Plane Color Properties | expand

Commit Message

Shankar, Uma March 19, 2019, 8:44 a.m. UTC 
Enable Plane Degamma for ICL.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/intel_color.c | 86 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 86 insertions(+)

Comments

kernel test robot March 19, 2019, 7:31 p.m. UTC | #1 
Hi Uma,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20190319]
[cannot apply to v5.1-rc1]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Uma-Shankar/Add-Plane-Color-Properties/20190319-222429
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
reproduce:
        # apt-get install sparse
        make ARCH=x86_64 allmodconfig
        make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__'


sparse warnings: (new ones prefixed by >>)

   include/uapi/linux/perf_event.h:147:56: sparse: cast truncates bits from constant value (8000000000000000 becomes 0)
>> drivers/gpu/drm/i915/intel_color.c:635:55: sparse: constant 0x7ffffffff is so big it is long
   drivers/gpu/drm/i915/intel_color.c:119:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:119:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:119:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:119:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:119:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:119:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:119:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:225:29: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:225:29: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:225:29: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:225:29: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:225:29: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:225:29: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:225:29: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:235:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:235:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:235:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:235:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:235:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:235:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:235:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:238:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:238:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:238:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:238:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:238:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:238:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:238:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:241:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:241:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:241:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:241:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:241:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:241:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:241:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:243:38: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:243:38: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:243:38: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:243:38: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:243:38: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:243:38: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:243:38: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:246:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:246:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:246:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:246:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:246:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:246:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:246:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:249:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:249:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:249:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:249:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:249:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:249:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:249:33: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:331:37: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:331:37: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:331:37: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:331:37: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:331:37: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:331:37: sparse: expression using sizeof(void)
   drivers/gpu/drm/i915/intel_color.c:331:37: sparse: expression using sizeof(void)

vim +635 drivers/gpu/drm/i915/intel_color.c

   617	
   618	static void icl_load_plane_degamma_lut(const struct drm_plane_state *state,
   619					       u32 offset)
   620	{
   621		struct drm_i915_private *dev_priv = to_i915(state->plane->dev);
   622		enum pipe pipe = to_intel_plane(state->plane)->pipe;
   623		enum plane_id plane = to_intel_plane(state->plane)->id;
   624		u32 i, lut_size;
   625	
   626		if (icl_is_hdr_plane(dev_priv, plane)) {
   627			lut_size = 128;
   628			if (state->degamma_lut) {
   629				struct drm_color_lut_ext *lut =
   630					(struct drm_color_lut_ext *)state->gamma_lut->data;
   631	
   632				for (i = 0; i < lut_size; i++) {
   633					u64 word = drm_color_lut_extract_ext(lut[i].red,
   634									     24);
 > 635					u32 lut_val = (word & 0x7ffffffff) >> 8;
   636	
   637					I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, i),
   638						   lut_val);
   639				}
   640	
   641				/* Program the max register to clamp values > 1.0. */
   642				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
   643					   drm_color_lut_extract_ext(lut[i].red, 24));
   644				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 1),
   645					   drm_color_lut_extract_ext(lut[i].green, 24));
   646				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 2),
   647					   drm_color_lut_extract_ext(lut[i].blue, 24));
   648			} else {
   649				for (i = 0; i < lut_size; i++) {
   650					u32 v = (i * ((1 << 24) - 1)) / (lut_size - 1);
   651					I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, i), v);
   652				}
   653	
   654				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
   655					   (1 << 24) - 1);
   656				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 1),
   657					   (1 << 24) - 1);
   658				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 2),
   659					   (1 << 24) - 1);
   660			}
   661		} else {
   662			lut_size = 32;
   663			if (state->degamma_lut) {
   664				struct drm_color_lut *lut =
   665					(struct drm_color_lut *)state->gamma_lut->data;
   666	
   667				for (i = 0; i < lut_size; i++)
   668					I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, i),
   669						   lut[i].green);
   670	
   671				/* Program the max register to clamp values > 1.0. */
   672				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0),
   673					   (1 << 16));
   674				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 1),
   675					   (1 << 16));
   676				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 2),
   677					   (1 << 16));
   678			} else {
   679				for (i = 0; i < lut_size; i++) {
   680					u32 v = (i * ((1 << 24) - 1)) / (lut_size - 1);
   681	
   682					I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, i), v);
   683				}
   684	
   685				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0),
   686					   (1 << 16));
   687				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 1),
   688					   (1 << 16));
   689				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 2),
   690					   (1 << 16));
   691			}
   692		}
   693	}
   694	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index afb1d00..504c046 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -615,6 +615,89 @@  static void broadwell_load_plane_luts(const struct drm_plane_state *state)
 				 INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size);
 }
 
+static void icl_load_plane_degamma_lut(const struct drm_plane_state *state,
+				       u32 offset)
+{
+	struct drm_i915_private *dev_priv = to_i915(state->plane->dev);
+	enum pipe pipe = to_intel_plane(state->plane)->pipe;
+	enum plane_id plane = to_intel_plane(state->plane)->id;
+	u32 i, lut_size;
+
+	if (icl_is_hdr_plane(dev_priv, plane)) {
+		lut_size = 128;
+		if (state->degamma_lut) {
+			struct drm_color_lut_ext *lut =
+				(struct drm_color_lut_ext *)state->gamma_lut->data;
+
+			for (i = 0; i < lut_size; i++) {
+				u64 word = drm_color_lut_extract_ext(lut[i].red,
+								     24);
+				u32 lut_val = (word & 0x7ffffffff) >> 8;
+
+				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, i),
+					   lut_val);
+			}
+
+			/* Program the max register to clamp values > 1.0. */
+			I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+				   drm_color_lut_extract_ext(lut[i].red, 24));
+			I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 1),
+				   drm_color_lut_extract_ext(lut[i].green, 24));
+			I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 2),
+				   drm_color_lut_extract_ext(lut[i].blue, 24));
+		} else {
+			for (i = 0; i < lut_size; i++) {
+				u32 v = (i * ((1 << 24) - 1)) / (lut_size - 1);
+				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, i), v);
+			}
+
+			I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+				   (1 << 24) - 1);
+			I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 1),
+				   (1 << 24) - 1);
+			I915_WRITE(PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 2),
+				   (1 << 24) - 1);
+		}
+	} else {
+		lut_size = 32;
+		if (state->degamma_lut) {
+			struct drm_color_lut *lut =
+				(struct drm_color_lut *)state->gamma_lut->data;
+
+			for (i = 0; i < lut_size; i++)
+				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, i),
+					   lut[i].green);
+
+			/* Program the max register to clamp values > 1.0. */
+			I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0),
+				   (1 << 16));
+			I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 1),
+				   (1 << 16));
+			I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 2),
+				   (1 << 16));
+		} else {
+			for (i = 0; i < lut_size; i++) {
+				u32 v = (i * ((1 << 24) - 1)) / (lut_size - 1);
+
+				I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, i), v);
+			}
+
+			I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0),
+				   (1 << 16));
+			I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 1),
+				   (1 << 16));
+			I915_WRITE(PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 2),
+				   (1 << 16));
+		}
+	}
+}
+
+/* Loads the palette/gamma unit for the CRTC on Gen11+. */
+static void icl_load_plane_luts(const struct drm_plane_state *state)
+{
+	icl_load_plane_degamma_lut(state, 0);
+}
+
 static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
@@ -978,6 +1061,9 @@  void intel_color_init(struct intel_crtc *crtc)
 			dev_priv->display.color_commit = ilk_color_commit;
 	}
 
+	if (INTEL_GEN(dev_priv) >= 11)
+		dev_priv->display.load_plane_luts = icl_load_plane_luts;
+
 	/* Enable color management support when we have degamma & gamma LUTs. */
 	if (INTEL_INFO(dev_priv)->color.degamma_lut_size != 0 &&
 	    INTEL_INFO(dev_priv)->color.gamma_lut_size != 0)