From patchwork Mon Aug 22 18:17:03 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 1086062 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p7MIHXWW020790 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Mon, 22 Aug 2011 18:17:54 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QvZ3h-0002VG-1z; Mon, 22 Aug 2011 18:17:13 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QvZ3g-0003Ga-J0; Mon, 22 Aug 2011 18:17:12 +0000 Received: from tx2ehsobe002.messaging.microsoft.com ([65.55.88.12] helo=TX2EHSOBE004.bigfish.com) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QvZ3d-0003GH-1r for linux-arm-kernel@lists.infradead.org; Mon, 22 Aug 2011 18:17:09 +0000 Received: from mail5-tx2-R.bigfish.com (10.9.14.237) by TX2EHSOBE004.bigfish.com (10.9.40.24) with Microsoft SMTP Server id 14.1.225.22; Mon, 22 Aug 2011 18:17:05 +0000 Received: from mail5-tx2 (localhost.localdomain [127.0.0.1]) by mail5-tx2-R.bigfish.com (Postfix) with ESMTP id 24F6D1538296; Mon, 22 Aug 2011 18:17:03 +0000 (UTC) X-SpamScore: 7 X-BigFish: VS7(z1039ozzz1202hzz8275bhz2dh2a8h668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail5-tx2 (localhost.localdomain [127.0.0.1]) by mail5-tx2 (MessageSwitch) id 1314037022952882_12251; Mon, 22 Aug 2011 18:17:02 +0000 (UTC) Received: from TX2EHSMHS001.bigfish.com (unknown [10.9.14.247]) by mail5-tx2.bigfish.com (Postfix) with ESMTP id DEFB613D806C; Mon, 22 Aug 2011 18:17:00 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS001.bigfish.com (10.9.99.101) with Microsoft SMTP Server (TLS) id 14.1.225.22; Mon, 22 Aug 2011 18:16:57 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.323.2; Mon, 22 Aug 2011 13:16:56 -0500 Received: from fabio-Latitude-E6410.am.freescale.net ([10.29.240.183]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p7MIGrok016279; Mon, 22 Aug 2011 13:16:54 -0500 (CDT) From: Fabio Estevam To: Subject: [PATCH v2 1/2] ARM: imx: Introduce generic function for displaying silicon revision Date: Mon, 22 Aug 2011 15:17:03 -0300 Message-ID: <1314037024-9015-1-git-send-email-fabio.estevam@freescale.com> X-Mailer: git-send-email 1.7.1 MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110822_141709_268284_0B0175C4 X-CRM114-Status: GOOD ( 16.15 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [65.55.88.12 listed in list.dnswl.org] Cc: Fabio Estevam , marek.vasut@gmail.com, kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 22 Aug 2011 18:17:54 +0000 (UTC) Currently each i.MX processor has its own function for displaying the silicon revision. Introduce a generic function for this purpose, so that all i.MX processors can reuse it. Signed-off-by: Fabio Estevam --- Changes since v1: - Introduce this generic function as suggested by Sascha Hauer. Sascha, If these 2 patches are merged, then I will convert the other i.MX processors to use this new method. arch/arm/plat-mxc/cpu.c | 10 ++++++++++ arch/arm/plat-mxc/include/mach/common.h | 1 + 2 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/plat-mxc/cpu.c index 386e0d5..f081ef0 100644 --- a/arch/arm/plat-mxc/cpu.c +++ b/arch/arm/plat-mxc/cpu.c @@ -1,5 +1,6 @@ #include +#include unsigned int __mxc_cpu_type; EXPORT_SYMBOL(__mxc_cpu_type); @@ -9,3 +10,12 @@ void mxc_set_cpu_type(unsigned int type) __mxc_cpu_type = type; } +void imx_print_silicon_rev(const char *cpu, int srev) +{ + if (srev == IMX_CHIP_REVISION_UNKNOWN) + pr_info("CPU identified as %s, unknown revision\n", cpu); + else + pr_info("CPU identified as %s, silicon rev %d.%d\n", + cpu, (srev >> 4) & 0xf, srev & 0xf); +} +EXPORT_SYMBOL(imx_print_silicon_rev); diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 91fa263..e427f63 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -72,4 +72,5 @@ extern void mxc_arch_reset_init(void __iomem *); extern void mx51_efikamx_reset(void); extern int mx53_revision(void); extern int mx53_display_revision(void); +extern void imx_print_silicon_rev(const char *cpu, int srev); #endif