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[78.203.165.84]) by smtp.gmail.com with ESMTPSA id y66sm8050503wmd.37.2019.03.23.14.17.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 23 Mar 2019 14:17:33 -0700 (PDT) From: Fabien Parent To: matthias.bgg@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com Cc: sean.wang@kernel.org, ryder.lee@mediatek.com, hsin-hsiung.wang@mediatek.com, wenzhen.yu@mediatek.com, chaotian.jing@mediatek.com, yong.mao@mediatek.com, jjian.zhou@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org, linux-spi@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-clk@vger.kernel.org, stephane.leprovost@mediatek.com, Fabien Parent Subject: [PATCH 21/24] dt-bindings: irq: mtk,sysirq: add support for MT8516 Date: Sat, 23 Mar 2019 22:16:09 +0100 Message-Id: <20190323211612.860-22-fparent@baylibre.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190323211612.860-1-fparent@baylibre.com> References: <20190323211612.860-1-fparent@baylibre.com> MIME-Version: 1.0 Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add binding documentation of mediatek,sysirq for MT8516 SoC. Signed-off-by: Fabien Parent Acked-by: Rob Herring --- .../bindings/interrupt-controller/mediatek,sysirq.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt index c5d589108a94..deaaba70d548 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt @@ -1,10 +1,11 @@ -+Mediatek MT65xx/MT67xx/MT81xx sysirq ++Mediatek MT65xx/MT67xx/MT81xx/MT85xx sysirq Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI interrupt. Required properties: - compatible: should be + "mediatek,mt8516-sysirq", "mediatek,mt6577-sysirq": for MT8516 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127