| Message ID | 1553677398-7896-1-git-send-email-na-hoan@jinso.co.jp (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | [RESEND] thermal: rcar_gen3_thermal: Fix init value of IRQCTL register | expand |
Hi Hoan, Thanks for your work, and sorry for dropping the ball on this in v2. On 2019-03-27 18:03:18 +0900, Nguyen An Hoan wrote: > From: Hoan Nguyen An <na-hoan@jinso.co.jp> > > Fix setting value for IRQCTL register. We are setting the last 6 bits > of (IRQCTL) to be 1 (0x3f), this is only suitable for H3ES1.*, according > to Hardware manual values 1 are "setting prohibited" for Gen3. > > Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp> Reviewed-by: Niklas Söderlund <niklas.soderlund@ragnatech.se> > --- > drivers/thermal/rcar_gen3_thermal.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/thermal/rcar_gen3_thermal.c b/drivers/thermal/rcar_gen3_thermal.c > index 88fa41c..2482795 100644 > --- a/drivers/thermal/rcar_gen3_thermal.c > +++ b/drivers/thermal/rcar_gen3_thermal.c > @@ -307,7 +307,7 @@ static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc) > > usleep_range(1000, 2000); > > - rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F); > + rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0); > rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0); > rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2); > > -- > 2.7.4 >
Hi Hoan-san, > From: Nguyen An Hoan, Sent: Wednesday, March 27, 2019 6:03 PM > > Fix setting value for IRQCTL register. We are setting the last 6 bits > of (IRQCTL) to be 1 (0x3f), this is only suitable for H3ES1.*, according > to Hardware manual values 1 are "setting prohibited" for Gen3. > > Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp> Thank you for the patch! Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Best regards, Yoshihiro Shimoda
On Wed, Mar 27, 2019 at 06:03:18PM +0900, Nguyen An Hoan wrote: > From: Hoan Nguyen An <na-hoan@jinso.co.jp> > > Fix setting value for IRQCTL register. We are setting the last 6 bits > of (IRQCTL) to be 1 (0x3f), this is only suitable for H3ES1.*, according > to Hardware manual values 1 are "setting prohibited" for Gen3. > > Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp> Yes, this is what we discussed for "[v2 PATCH] thermal: rcar_gen3_thermal: Fix init value of IRQCTL register" Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
On Wed, Mar 27, 2019 at 10:04 AM Nguyen An Hoan <na-hoan@jinso.co.jp> wrote: > From: Hoan Nguyen An <na-hoan@jinso.co.jp> > > Fix setting value for IRQCTL register. We are setting the last 6 bits > of (IRQCTL) to be 1 (0x3f), this is only suitable for H3ES1.*, according > to Hardware manual values 1 are "setting prohibited" for Gen3. > > Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
diff --git a/drivers/thermal/rcar_gen3_thermal.c b/drivers/thermal/rcar_gen3_thermal.c index 88fa41c..2482795 100644 --- a/drivers/thermal/rcar_gen3_thermal.c +++ b/drivers/thermal/rcar_gen3_thermal.c @@ -307,7 +307,7 @@ static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc) usleep_range(1000, 2000); - rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F); + rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0); rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0); rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);