diff mbox series

[1/5] clk: renesas: rcar-gen3: Correct parent clock of EHCI/OHCI

Message ID 20190327124140.8800-2-geert+renesas@glider.be (mailing list archive)
State Accepted
Delegated to: Geert Uytterhoeven
Headers show
Series clk: renesas: rcar-gen3: Errata Updates | expand

Commit Message

Geert Uytterhoeven March 27, 2019, 12:41 p.m. UTC 
From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>

According to the R-Car Gen3 Hardware Manual Rev. 1.00, and the RZ/G2
Hardware Manual Rev. 0.61, the parent clock of the EHCI/OHCI module
clocks on R-Car Gen3 and RZ/G2 SoCs is S3D2.

Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
[takeshi: Update R-Car H3, M3-N, and E3]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Update RZ/G2M and RZ/G2E]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/clk/renesas/r8a774a1-cpg-mssr.c | 4 ++--
 drivers/clk/renesas/r8a774c0-cpg-mssr.c | 2 +-
 drivers/clk/renesas/r8a7795-cpg-mssr.c  | 8 ++++----
 drivers/clk/renesas/r8a7796-cpg-mssr.c  | 4 ++--
 drivers/clk/renesas/r8a77965-cpg-mssr.c | 4 ++--
 drivers/clk/renesas/r8a77990-cpg-mssr.c | 2 +-
 6 files changed, 12 insertions(+), 12 deletions(-)

Comments

Simon Horman March 29, 2019, 9:02 a.m. UTC | #1 
On Wed, Mar 27, 2019 at 01:41:36PM +0100, Geert Uytterhoeven wrote:
> From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
> 
> According to the R-Car Gen3 Hardware Manual Rev. 1.00, and the RZ/G2
> Hardware Manual Rev. 0.61, the parent clock of the EHCI/OHCI module
> clocks on R-Car Gen3 and RZ/G2 SoCs is S3D2.
> 
> Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
> [takeshi: Update R-Car H3, M3-N, and E3]
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [geert: Update RZ/G2M and RZ/G2E]
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

During my review I saw that R-Car E3 (r8a77990) is already using
the correct parent clock. And with this change all R-Car Gen3 and RZ/G2
SoCs do so.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

> ---
>  drivers/clk/renesas/r8a774a1-cpg-mssr.c | 4 ++--
>  drivers/clk/renesas/r8a774c0-cpg-mssr.c | 2 +-
>  drivers/clk/renesas/r8a7795-cpg-mssr.c  | 8 ++++----
>  drivers/clk/renesas/r8a7796-cpg-mssr.c  | 4 ++--
>  drivers/clk/renesas/r8a77965-cpg-mssr.c | 4 ++--
>  drivers/clk/renesas/r8a77990-cpg-mssr.c | 2 +-
>  6 files changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> index 44161fd0a09caaba..bce0e6d6d02c7e7b 100644
> --- a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> @@ -165,8 +165,8 @@ static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = {
>  	DEF_MOD("vspd0",		 623,	R8A774A1_CLK_S0D2),
>  	DEF_MOD("vspb",			 626,	R8A774A1_CLK_S0D1),
>  	DEF_MOD("vspi0",		 631,	R8A774A1_CLK_S0D1),
> -	DEF_MOD("ehci1",		 702,	R8A774A1_CLK_S3D4),
> -	DEF_MOD("ehci0",		 703,	R8A774A1_CLK_S3D4),
> +	DEF_MOD("ehci1",		 702,	R8A774A1_CLK_S3D2),
> +	DEF_MOD("ehci0",		 703,	R8A774A1_CLK_S3D2),
>  	DEF_MOD("hsusb",		 704,	R8A774A1_CLK_S3D4),
>  	DEF_MOD("csi20",		 714,	R8A774A1_CLK_CSI0),
>  	DEF_MOD("csi40",		 716,	R8A774A1_CLK_CSI0),
> diff --git a/drivers/clk/renesas/r8a774c0-cpg-mssr.c b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
> index 57098b7e3d0eea3c..d095787f7d851fc9 100644
> --- a/drivers/clk/renesas/r8a774c0-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
> @@ -178,7 +178,7 @@ static const struct mssr_mod_clk r8a774c0_mod_clks[] __initconst = {
>  	DEF_MOD("vspb",			 626,	R8A774C0_CLK_S0D1),
>  	DEF_MOD("vspi0",		 631,	R8A774C0_CLK_S0D1),
>  
> -	DEF_MOD("ehci0",		 703,	R8A774C0_CLK_S3D4),
> +	DEF_MOD("ehci0",		 703,	R8A774C0_CLK_S3D2),
>  	DEF_MOD("hsusb",		 704,	R8A774C0_CLK_S3D4),
>  	DEF_MOD("csi40",		 716,	R8A774C0_CLK_CSI0),
>  	DEF_MOD("du1",			 723,	R8A774C0_CLK_S1D1),
> diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
> index 8287816523c3c602..b9e42da38b72bdcb 100644
> --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
> @@ -195,10 +195,10 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
>  	DEF_MOD("vspi2",		 629,	R8A7795_CLK_S2D1), /* ES1.x */
>  	DEF_MOD("vspi1",		 630,	R8A7795_CLK_S0D1),
>  	DEF_MOD("vspi0",		 631,	R8A7795_CLK_S0D1),
> -	DEF_MOD("ehci3",		 700,	R8A7795_CLK_S3D4),
> -	DEF_MOD("ehci2",		 701,	R8A7795_CLK_S3D4),
> -	DEF_MOD("ehci1",		 702,	R8A7795_CLK_S3D4),
> -	DEF_MOD("ehci0",		 703,	R8A7795_CLK_S3D4),
> +	DEF_MOD("ehci3",		 700,	R8A7795_CLK_S3D2),
> +	DEF_MOD("ehci2",		 701,	R8A7795_CLK_S3D2),
> +	DEF_MOD("ehci1",		 702,	R8A7795_CLK_S3D2),
> +	DEF_MOD("ehci0",		 703,	R8A7795_CLK_S3D2),
>  	DEF_MOD("hsusb",		 704,	R8A7795_CLK_S3D4),
>  	DEF_MOD("hsusb3",		 705,	R8A7795_CLK_S3D4),
>  	DEF_MOD("csi21",		 713,	R8A7795_CLK_CSI0), /* ES1.x */
> diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
> index 5cde1bff89235e90..97b58f13111441a8 100644
> --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
> @@ -177,8 +177,8 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
>  	DEF_MOD("vspd0",		 623,	R8A7796_CLK_S0D2),
>  	DEF_MOD("vspb",			 626,	R8A7796_CLK_S0D1),
>  	DEF_MOD("vspi0",		 631,	R8A7796_CLK_S0D1),
> -	DEF_MOD("ehci1",		 702,	R8A7796_CLK_S3D4),
> -	DEF_MOD("ehci0",		 703,	R8A7796_CLK_S3D4),
> +	DEF_MOD("ehci1",		 702,	R8A7796_CLK_S3D2),
> +	DEF_MOD("ehci0",		 703,	R8A7796_CLK_S3D2),
>  	DEF_MOD("hsusb",		 704,	R8A7796_CLK_S3D4),
>  	DEF_MOD("csi20",		 714,	R8A7796_CLK_CSI0),
>  	DEF_MOD("csi40",		 716,	R8A7796_CLK_CSI0),
> diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
> index fefa26a1a797d9a8..ab25bd5f1371869e 100644
> --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
> @@ -175,8 +175,8 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
>  	DEF_MOD("vspb",			626,	R8A77965_CLK_S0D1),
>  	DEF_MOD("vspi0",		631,	R8A77965_CLK_S0D1),
>  
> -	DEF_MOD("ehci1",		702,	R8A77965_CLK_S3D4),
> -	DEF_MOD("ehci0",		703,	R8A77965_CLK_S3D4),
> +	DEF_MOD("ehci1",		702,	R8A77965_CLK_S3D2),
> +	DEF_MOD("ehci0",		703,	R8A77965_CLK_S3D2),
>  	DEF_MOD("hsusb",		704,	R8A77965_CLK_S3D4),
>  	DEF_MOD("csi20",		714,	R8A77965_CLK_CSI0),
>  	DEF_MOD("csi40",		716,	R8A77965_CLK_CSI0),
> diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c
> index 99f602cb30a55913..3f22b8565648d590 100644
> --- a/drivers/clk/renesas/r8a77990-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c
> @@ -181,7 +181,7 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] __initconst = {
>  	DEF_MOD("vspb",			 626,	R8A77990_CLK_S0D1),
>  	DEF_MOD("vspi0",		 631,	R8A77990_CLK_S0D1),
>  
> -	DEF_MOD("ehci0",		 703,	R8A77990_CLK_S3D4),
> +	DEF_MOD("ehci0",		 703,	R8A77990_CLK_S3D2),
>  	DEF_MOD("hsusb",		 704,	R8A77990_CLK_S3D4),
>  	DEF_MOD("csi40",		 716,	R8A77990_CLK_CSI0),
>  	DEF_MOD("du1",			 723,	R8A77990_CLK_S1D1),
> -- 
> 2.17.1
>
Geert Uytterhoeven March 29, 2019, 9:07 a.m. UTC | #2 
Hi Simon,

On Fri, Mar 29, 2019 at 10:03 AM Simon Horman <horms@verge.net.au> wrote:
> On Wed, Mar 27, 2019 at 01:41:36PM +0100, Geert Uytterhoeven wrote:
> > From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
> >
> > According to the R-Car Gen3 Hardware Manual Rev. 1.00, and the RZ/G2
> > Hardware Manual Rev. 0.61, the parent clock of the EHCI/OHCI module
> > clocks on R-Car Gen3 and RZ/G2 SoCs is S3D2.
> >
> > Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
> > [takeshi: Update R-Car H3, M3-N, and E3]
> > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> > [geert: Update RZ/G2M and RZ/G2E]
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> During my review I saw that R-Car E3 (r8a77990) is already using

D3 (r8a77995)?

> the correct parent clock. And with this change all R-Car Gen3 and RZ/G2
> SoCs do so.
>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Thanks!

Gr{oetje,eeting}s,

                        Geert
Simon Horman March 29, 2019, 9:19 a.m. UTC | #3 
On Fri, Mar 29, 2019 at 10:07:13AM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
> 
> On Fri, Mar 29, 2019 at 10:03 AM Simon Horman <horms@verge.net.au> wrote:
> > On Wed, Mar 27, 2019 at 01:41:36PM +0100, Geert Uytterhoeven wrote:
> > > From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
> > >
> > > According to the R-Car Gen3 Hardware Manual Rev. 1.00, and the RZ/G2
> > > Hardware Manual Rev. 0.61, the parent clock of the EHCI/OHCI module
> > > clocks on R-Car Gen3 and RZ/G2 SoCs is S3D2.
> > >
> > > Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
> > > [takeshi: Update R-Car H3, M3-N, and E3]
> > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> > > [geert: Update RZ/G2M and RZ/G2E]
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >
> > During my review I saw that R-Car E3 (r8a77990) is already using
> 
> D3 (r8a77995)?

Yes, my bad.

> > the correct parent clock. And with this change all R-Car Gen3 and RZ/G2
> > SoCs do so.
> >
> > Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
> 
> Thanks!
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> -- 
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
>
diff mbox series

Patch

diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
index 44161fd0a09caaba..bce0e6d6d02c7e7b 100644
--- a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
@@ -165,8 +165,8 @@  static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = {
 	DEF_MOD("vspd0",		 623,	R8A774A1_CLK_S0D2),
 	DEF_MOD("vspb",			 626,	R8A774A1_CLK_S0D1),
 	DEF_MOD("vspi0",		 631,	R8A774A1_CLK_S0D1),
-	DEF_MOD("ehci1",		 702,	R8A774A1_CLK_S3D4),
-	DEF_MOD("ehci0",		 703,	R8A774A1_CLK_S3D4),
+	DEF_MOD("ehci1",		 702,	R8A774A1_CLK_S3D2),
+	DEF_MOD("ehci0",		 703,	R8A774A1_CLK_S3D2),
 	DEF_MOD("hsusb",		 704,	R8A774A1_CLK_S3D4),
 	DEF_MOD("csi20",		 714,	R8A774A1_CLK_CSI0),
 	DEF_MOD("csi40",		 716,	R8A774A1_CLK_CSI0),
diff --git a/drivers/clk/renesas/r8a774c0-cpg-mssr.c b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
index 57098b7e3d0eea3c..d095787f7d851fc9 100644
--- a/drivers/clk/renesas/r8a774c0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
@@ -178,7 +178,7 @@  static const struct mssr_mod_clk r8a774c0_mod_clks[] __initconst = {
 	DEF_MOD("vspb",			 626,	R8A774C0_CLK_S0D1),
 	DEF_MOD("vspi0",		 631,	R8A774C0_CLK_S0D1),
 
-	DEF_MOD("ehci0",		 703,	R8A774C0_CLK_S3D4),
+	DEF_MOD("ehci0",		 703,	R8A774C0_CLK_S3D2),
 	DEF_MOD("hsusb",		 704,	R8A774C0_CLK_S3D4),
 	DEF_MOD("csi40",		 716,	R8A774C0_CLK_CSI0),
 	DEF_MOD("du1",			 723,	R8A774C0_CLK_S1D1),
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index 8287816523c3c602..b9e42da38b72bdcb 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -195,10 +195,10 @@  static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
 	DEF_MOD("vspi2",		 629,	R8A7795_CLK_S2D1), /* ES1.x */
 	DEF_MOD("vspi1",		 630,	R8A7795_CLK_S0D1),
 	DEF_MOD("vspi0",		 631,	R8A7795_CLK_S0D1),
-	DEF_MOD("ehci3",		 700,	R8A7795_CLK_S3D4),
-	DEF_MOD("ehci2",		 701,	R8A7795_CLK_S3D4),
-	DEF_MOD("ehci1",		 702,	R8A7795_CLK_S3D4),
-	DEF_MOD("ehci0",		 703,	R8A7795_CLK_S3D4),
+	DEF_MOD("ehci3",		 700,	R8A7795_CLK_S3D2),
+	DEF_MOD("ehci2",		 701,	R8A7795_CLK_S3D2),
+	DEF_MOD("ehci1",		 702,	R8A7795_CLK_S3D2),
+	DEF_MOD("ehci0",		 703,	R8A7795_CLK_S3D2),
 	DEF_MOD("hsusb",		 704,	R8A7795_CLK_S3D4),
 	DEF_MOD("hsusb3",		 705,	R8A7795_CLK_S3D4),
 	DEF_MOD("csi21",		 713,	R8A7795_CLK_CSI0), /* ES1.x */
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 5cde1bff89235e90..97b58f13111441a8 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -177,8 +177,8 @@  static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
 	DEF_MOD("vspd0",		 623,	R8A7796_CLK_S0D2),
 	DEF_MOD("vspb",			 626,	R8A7796_CLK_S0D1),
 	DEF_MOD("vspi0",		 631,	R8A7796_CLK_S0D1),
-	DEF_MOD("ehci1",		 702,	R8A7796_CLK_S3D4),
-	DEF_MOD("ehci0",		 703,	R8A7796_CLK_S3D4),
+	DEF_MOD("ehci1",		 702,	R8A7796_CLK_S3D2),
+	DEF_MOD("ehci0",		 703,	R8A7796_CLK_S3D2),
 	DEF_MOD("hsusb",		 704,	R8A7796_CLK_S3D4),
 	DEF_MOD("csi20",		 714,	R8A7796_CLK_CSI0),
 	DEF_MOD("csi40",		 716,	R8A7796_CLK_CSI0),
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index fefa26a1a797d9a8..ab25bd5f1371869e 100644
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -175,8 +175,8 @@  static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
 	DEF_MOD("vspb",			626,	R8A77965_CLK_S0D1),
 	DEF_MOD("vspi0",		631,	R8A77965_CLK_S0D1),
 
-	DEF_MOD("ehci1",		702,	R8A77965_CLK_S3D4),
-	DEF_MOD("ehci0",		703,	R8A77965_CLK_S3D4),
+	DEF_MOD("ehci1",		702,	R8A77965_CLK_S3D2),
+	DEF_MOD("ehci0",		703,	R8A77965_CLK_S3D2),
 	DEF_MOD("hsusb",		704,	R8A77965_CLK_S3D4),
 	DEF_MOD("csi20",		714,	R8A77965_CLK_CSI0),
 	DEF_MOD("csi40",		716,	R8A77965_CLK_CSI0),
diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c
index 99f602cb30a55913..3f22b8565648d590 100644
--- a/drivers/clk/renesas/r8a77990-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c
@@ -181,7 +181,7 @@  static const struct mssr_mod_clk r8a77990_mod_clks[] __initconst = {
 	DEF_MOD("vspb",			 626,	R8A77990_CLK_S0D1),
 	DEF_MOD("vspi0",		 631,	R8A77990_CLK_S0D1),
 
-	DEF_MOD("ehci0",		 703,	R8A77990_CLK_S3D4),
+	DEF_MOD("ehci0",		 703,	R8A77990_CLK_S3D2),
 	DEF_MOD("hsusb",		 704,	R8A77990_CLK_S3D4),
 	DEF_MOD("csi40",		 716,	R8A77990_CLK_CSI0),
 	DEF_MOD("du1",			 723,	R8A77990_CLK_S1D1),