diff mbox series

[6/6] drm/i915: Expose the legacy LUT via the GAMMA_LUT/GAMMA_LUT_SIZE props on gen2/3

Message ID 20190328210505.10429-7-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Finish the GAMMA_LUT stuff | expand

Commit Message

Ville Syrjälä March 28, 2019, 9:05 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Just so we don't leave gen2/3 out in the cold let's advertize the
legacy LUT via the GAMMA_LUT/GAMMA_LUT_SIZE props. Without the
GAMMA_LUT prop we can't actually load a LUT using the atomic ioctl
(in preparation for the day of 100% atomic driver).

Supposedly some gen2/3 platforms have an interpolated 10bit gamma mode
as well. It's slightly funkier than the i965+ mode since you have to
specify the slope for the interpolation by hand. But when I tried it
I couldn't get it to work, the hardware just insisted on using the
8bit more regardless of the state of the relevant PIPECONF bit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c    |  5 +++++
 drivers/gpu/drm/i915/intel_color.c | 13 +++++--------
 2 files changed, 10 insertions(+), 8 deletions(-)

Comments

Sripada, Radhakrishna April 4, 2019, 4:52 p.m. UTC | #1 
On Thu, 2019-03-28 at 23:05 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Just so we don't leave gen2/3 out in the cold let's advertize the
> legacy LUT via the GAMMA_LUT/GAMMA_LUT_SIZE props. Without the
> GAMMA_LUT prop we can't actually load a LUT using the atomic ioctl
> (in preparation for the day of 100% atomic driver).
> 
> Supposedly some gen2/3 platforms have an interpolated 10bit gamma
> mode
> as well. It's slightly funkier than the i965+ mode since you have to
> specify the slope for the interpolation by hand. But when I tried it
> I couldn't get it to work, the hardware just insisted on using the
> 8bit more regardless of the state of the relevant PIPECONF bit.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
LGTM.
Revieweed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c    |  5 +++++
>  drivers/gpu/drm/i915/intel_color.c | 13 +++++--------
>  2 files changed, 10 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c
> b/drivers/gpu/drm/i915/i915_pci.c
> index 0c5258aa13bb..0e76df27f151 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -116,6 +116,8 @@
>  		[PIPE_C] = IVB_CURSOR_C_OFFSET, \
>  	}
>  
> +#define I9XX_COLORS \
> +	.color = { .gamma_lut_size = 256 }
>  #define I965_COLORS \
>  	.color = { .gamma_lut_size = 129, \
>  		   .gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \
> @@ -156,6 +158,7 @@
>  	.has_coherent_ggtt = false, \
>  	I9XX_PIPE_OFFSETS, \
>  	I9XX_CURSOR_OFFSETS, \
> +	I9XX_COLORS, \
>  	GEN_DEFAULT_PAGE_SIZES
>  
>  #define I845_FEATURES \
> @@ -172,6 +175,7 @@
>  	.has_coherent_ggtt = false, \
>  	I845_PIPE_OFFSETS, \
>  	I845_CURSOR_OFFSETS, \
> +	I9XX_COLORS, \
>  	GEN_DEFAULT_PAGE_SIZES
>  
>  static const struct intel_device_info intel_i830_info = {
> @@ -205,6 +209,7 @@ static const struct intel_device_info
> intel_i865g_info = {
>  	.has_coherent_ggtt = true, \
>  	I9XX_PIPE_OFFSETS, \
>  	I9XX_CURSOR_OFFSETS, \
> +	I9XX_COLORS, \
>  	GEN_DEFAULT_PAGE_SIZES
>  
>  static const struct intel_device_info intel_i915g_info = {
> diff --git a/drivers/gpu/drm/i915/intel_color.c
> b/drivers/gpu/drm/i915/intel_color.c
> index 07d62c7cb386..fd4a65af5cc4 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -1272,12 +1272,9 @@ void intel_color_init(struct intel_crtc *crtc)
>  			dev_priv->display.load_luts = ilk_load_luts;
>  	}
>  
> -	/* Enable color management support when we have degamma and/or
> gamma LUT. */
> -	if (INTEL_INFO(dev_priv)->color.degamma_lut_size != 0 ||
> -	    INTEL_INFO(dev_priv)->color.gamma_lut_size != 0)
> -		drm_crtc_enable_color_mgmt(&crtc->base,
> -					   INTEL_INFO(dev_priv)-
> >color.degamma_lut_size,
> -					   INTEL_INFO(dev_priv)-
> >color.degamma_lut_size &&
> -					   INTEL_INFO(dev_priv)-
> >color.gamma_lut_size,
> -					   INTEL_INFO(dev_priv)-
> >color.gamma_lut_size);
> +	drm_crtc_enable_color_mgmt(&crtc->base,
> +				   INTEL_INFO(dev_priv)-
> >color.degamma_lut_size,
> +				   INTEL_INFO(dev_priv)-
> >color.degamma_lut_size &&
> +				   INTEL_INFO(dev_priv)-
> >color.gamma_lut_size,
> +				   INTEL_INFO(dev_priv)-
> >color.gamma_lut_size);
>  }
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 0c5258aa13bb..0e76df27f151 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -116,6 +116,8 @@ 
 		[PIPE_C] = IVB_CURSOR_C_OFFSET, \
 	}
 
+#define I9XX_COLORS \
+	.color = { .gamma_lut_size = 256 }
 #define I965_COLORS \
 	.color = { .gamma_lut_size = 129, \
 		   .gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \
@@ -156,6 +158,7 @@ 
 	.has_coherent_ggtt = false, \
 	I9XX_PIPE_OFFSETS, \
 	I9XX_CURSOR_OFFSETS, \
+	I9XX_COLORS, \
 	GEN_DEFAULT_PAGE_SIZES
 
 #define I845_FEATURES \
@@ -172,6 +175,7 @@ 
 	.has_coherent_ggtt = false, \
 	I845_PIPE_OFFSETS, \
 	I845_CURSOR_OFFSETS, \
+	I9XX_COLORS, \
 	GEN_DEFAULT_PAGE_SIZES
 
 static const struct intel_device_info intel_i830_info = {
@@ -205,6 +209,7 @@  static const struct intel_device_info intel_i865g_info = {
 	.has_coherent_ggtt = true, \
 	I9XX_PIPE_OFFSETS, \
 	I9XX_CURSOR_OFFSETS, \
+	I9XX_COLORS, \
 	GEN_DEFAULT_PAGE_SIZES
 
 static const struct intel_device_info intel_i915g_info = {
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index 07d62c7cb386..fd4a65af5cc4 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -1272,12 +1272,9 @@  void intel_color_init(struct intel_crtc *crtc)
 			dev_priv->display.load_luts = ilk_load_luts;
 	}
 
-	/* Enable color management support when we have degamma and/or gamma LUT. */
-	if (INTEL_INFO(dev_priv)->color.degamma_lut_size != 0 ||
-	    INTEL_INFO(dev_priv)->color.gamma_lut_size != 0)
-		drm_crtc_enable_color_mgmt(&crtc->base,
-					   INTEL_INFO(dev_priv)->color.degamma_lut_size,
-					   INTEL_INFO(dev_priv)->color.degamma_lut_size &&
-					   INTEL_INFO(dev_priv)->color.gamma_lut_size,
-					   INTEL_INFO(dev_priv)->color.gamma_lut_size);
+	drm_crtc_enable_color_mgmt(&crtc->base,
+				   INTEL_INFO(dev_priv)->color.degamma_lut_size,
+				   INTEL_INFO(dev_priv)->color.degamma_lut_size &&
+				   INTEL_INFO(dev_priv)->color.gamma_lut_size,
+				   INTEL_INFO(dev_priv)->color.gamma_lut_size);
 }