drm/stm: ltdc: update planes at next vblank to avoid partial refresh
diff mbox series

Message ID 1554103457-29595-1-git-send-email-yannick.fertre@st.com
State New
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Series
  • drm/stm: ltdc: update planes at next vblank to avoid partial refresh
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Commit Message

Yannick Fertre April 1, 2019, 7:24 a.m. UTC
Plane updates must be synchronized on vblank with the shadow register mechanism
to avoid partial refresh on screen.

Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
---
 drivers/gpu/drm/stm/ltdc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Philippe CORNU April 1, 2019, 9:22 a.m. UTC | #1
Dear Yannick,
Thank you for your patch, works fine,

Acked-by: Philippe Cornu <philippe.cornu@st.com>

Philippe :-)

On 4/1/19 9:24 AM, Yannick Fertré wrote:
> Plane updates must be synchronized on vblank with the shadow register mechanism
> to avoid partial refresh on screen.
> 
> Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
> ---
>   drivers/gpu/drm/stm/ltdc.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
> index b1741a9..c2d0800 100644
> --- a/drivers/gpu/drm/stm/ltdc.c
> +++ b/drivers/gpu/drm/stm/ltdc.c
> @@ -426,8 +426,8 @@ static void ltdc_crtc_atomic_enable(struct drm_crtc *crtc,
>   	/* Enable IRQ */
>   	reg_set(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE);
>   
> -	/* Immediately commit the planes */
> -	reg_set(ldev->regs, LTDC_SRCR, SRCR_IMR);
> +	/* Commit shadow registers = update planes at next vblank */
> +	reg_set(ldev->regs, LTDC_SRCR, SRCR_VBR);
>   
>   	/* Enable LTDC */
>   	reg_set(ldev->regs, LTDC_GCR, GCR_LTDCEN);
>
Benjamin Gaignard April 24, 2019, 12:25 p.m. UTC | #2
Le lun. 1 avr. 2019 à 11:22, Philippe CORNU <philippe.cornu@st.com> a écrit :
>
> Dear Yannick,
> Thank you for your patch, works fine,
>
> Acked-by: Philippe Cornu <philippe.cornu@st.com>
>
Applied on drm-misc-next,
Thanks,
Benjamin

> Philippe :-)
>
> On 4/1/19 9:24 AM, Yannick Fertré wrote:
> > Plane updates must be synchronized on vblank with the shadow register mechanism
> > to avoid partial refresh on screen.
> >
> > Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
> > ---
> >   drivers/gpu/drm/stm/ltdc.c | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
> > index b1741a9..c2d0800 100644
> > --- a/drivers/gpu/drm/stm/ltdc.c
> > +++ b/drivers/gpu/drm/stm/ltdc.c
> > @@ -426,8 +426,8 @@ static void ltdc_crtc_atomic_enable(struct drm_crtc *crtc,
> >       /* Enable IRQ */
> >       reg_set(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE);
> >
> > -     /* Immediately commit the planes */
> > -     reg_set(ldev->regs, LTDC_SRCR, SRCR_IMR);
> > +     /* Commit shadow registers = update planes at next vblank */
> > +     reg_set(ldev->regs, LTDC_SRCR, SRCR_VBR);
> >
> >       /* Enable LTDC */
> >       reg_set(ldev->regs, LTDC_GCR, GCR_LTDCEN);
> >
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

Patch
diff mbox series

diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index b1741a9..c2d0800 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -426,8 +426,8 @@  static void ltdc_crtc_atomic_enable(struct drm_crtc *crtc,
 	/* Enable IRQ */
 	reg_set(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE);
 
-	/* Immediately commit the planes */
-	reg_set(ldev->regs, LTDC_SRCR, SRCR_IMR);
+	/* Commit shadow registers = update planes at next vblank */
+	reg_set(ldev->regs, LTDC_SRCR, SRCR_VBR);
 
 	/* Enable LTDC */
 	reg_set(ldev->regs, LTDC_GCR, GCR_LTDCEN);