soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmask
diff mbox series

Message ID 20190401074801.10414-1-narmstrong@baylibre.com
State Mainlined
Commit 2fe3b4bbc93ec30a173ebae7d2b8c530416df3af
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Series
  • soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmask
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Commit Message

Neil Armstrong April 1, 2019, 7:48 a.m. UTC
The register bitmask to power on/off the VPU memories was incorectly set
to 0x2 instead of 0x3. While still working, let's use the recommended
vendor value instead.

Fixes: 75fcb5ca4b46 ("soc: amlogic: add Meson GX VPU Domains driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/soc/amlogic/meson-gx-pwrc-vpu.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Kevin Hilman April 16, 2019, 12:40 a.m. UTC | #1
Neil Armstrong <narmstrong@baylibre.com> writes:

> The register bitmask to power on/off the VPU memories was incorectly set
> to 0x2 instead of 0x3. While still working, let's use the recommended
> vendor value instead.
>
> Fixes: 75fcb5ca4b46 ("soc: amlogic: add Meson GX VPU Domains driver")
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Queued for v5.2,

Kevin

Patch
diff mbox series

diff --git a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
index 6289965c42e9..05421d029dff 100644
--- a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
+++ b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
@@ -54,12 +54,12 @@  static int meson_gx_pwrc_vpu_power_off(struct generic_pm_domain *genpd)
 	/* Power Down Memories */
 	for (i = 0; i < 32; i += 2) {
 		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
-				   0x2 << i, 0x3 << i);
+				   0x3 << i, 0x3 << i);
 		udelay(5);
 	}
 	for (i = 0; i < 32; i += 2) {
 		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
-				   0x2 << i, 0x3 << i);
+				   0x3 << i, 0x3 << i);
 		udelay(5);
 	}
 	for (i = 8; i < 16; i++) {
@@ -108,13 +108,13 @@  static int meson_gx_pwrc_vpu_power_on(struct generic_pm_domain *genpd)
 	/* Power Up Memories */
 	for (i = 0; i < 32; i += 2) {
 		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
-				   0x2 << i, 0);
+				   0x3 << i, 0);
 		udelay(5);
 	}
 
 	for (i = 0; i < 32; i += 2) {
 		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
-				   0x2 << i, 0);
+				   0x3 << i, 0);
 		udelay(5);
 	}