diff mbox series

[v2,4/5] nvmem: sunxi-sid: add new reg_read func

Message ID 20190402154514.11284-5-tiny.windzz@gmail.com (mailing list archive)
State New, archived
Headers show
Series nvmem: sunxi-sid: add SID controller support for H6 | expand

Commit Message

Yangtao Li April 2, 2019, 3:45 p.m. UTC
Because there was an endianness issue. It seems that reg_read
function which the nvmem the driver currently exposes is wrong.
So add the new read function, the new function is used when the
native_endian flag is set.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
---
 drivers/nvmem/sunxi_sid.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

Comments

Srinivas Kandagatla April 4, 2019, 10:59 a.m. UTC | #1
On 02/04/2019 16:45, Yangtao Li wrote:
> Because there was an endianness issue. It seems that reg_read
> function which the nvmem the driver currently exposes is wrong.
> So add the new read function, the new function is used when the
> native_endian flag is set.
> 
> Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>

This patch and 5/5 does not apply cleanly on nvmem-next.
Also I would need an ack from Maxime to be able to apply it.

thanks,
srini
Maxime Ripard April 4, 2019, 11:05 a.m. UTC | #2
On Thu, Apr 04, 2019 at 11:59:44AM +0100, Srinivas Kandagatla wrote:
>
>
> On 02/04/2019 16:45, Yangtao Li wrote:
> > Because there was an endianness issue. It seems that reg_read
> > function which the nvmem the driver currently exposes is wrong.
> > So add the new read function, the new function is used when the
> > native_endian flag is set.
> >
> > Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
>
> This patch and 5/5 does not apply cleanly on nvmem-next.
> Also I would need an ack from Maxime to be able to apply it.

Chen-Yu has mostly been taking care of this recently, so I'd like his
feedback on this.

Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Chen-Yu Tsai April 4, 2019, 1:36 p.m. UTC | #3
On Thu, Apr 4, 2019 at 7:05 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
>
> On Thu, Apr 04, 2019 at 11:59:44AM +0100, Srinivas Kandagatla wrote:
> >
> >
> > On 02/04/2019 16:45, Yangtao Li wrote:
> > > Because there was an endianness issue. It seems that reg_read
> > > function which the nvmem the driver currently exposes is wrong.
> > > So add the new read function, the new function is used when the
> > > native_endian flag is set.
> > >
> > > Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
> >
> > This patch and 5/5 does not apply cleanly on nvmem-next.
> > Also I would need an ack from Maxime to be able to apply it.
>
> Chen-Yu has mostly been taking care of this recently, so I'd like his
> feedback on this.

As you previously requested, my patches already switch everything
to native endianess. There's no need to differentiate between the
old and the new now. So this patch and the native_endian flag is
not needed.

ChenYu
diff mbox series

Patch

diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c
index 54620d72ddb9..5b8a42f686cd 100644
--- a/drivers/nvmem/sunxi_sid.c
+++ b/drivers/nvmem/sunxi_sid.c
@@ -37,6 +37,7 @@  struct sunxi_sid_cfg {
 	u32	value_offset;
 	u32	size;
 	bool	need_register_readout;
+	bool	native_endian;
 };
 
 struct sunxi_sid {
@@ -75,6 +76,31 @@  static int sunxi_sid_read(void *context, unsigned int offset,
 	return 0;
 }
 
+static u8 sunxi_sid_read_byte_native(const struct sunxi_sid *sid,
+			      const unsigned int offset)
+{
+	u32 sid_key;
+
+	sid_key = ioread32(sid->base + round_down(offset, 4));
+	sid_key >>= (offset % 4) * 8;
+
+	return sid_key;
+}
+
+static int sunxi_sid_read_native(void *context, unsigned int offset,
+			  void *val, size_t bytes)
+{
+	struct sunxi_sid *sid = context;
+	u8 *buf = val;
+
+	offset += sid->value_offset;
+
+	while (bytes--)
+		*buf++ = sunxi_sid_read_byte_native(sid, offset++);
+
+	return 0;
+}
+
 static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
 				      const unsigned int offset,
 				      u32 *out)
@@ -169,9 +195,12 @@  static int sunxi_sid_probe(struct platform_device *pdev)
 	econfig.dev = dev;
 	if (cfg->need_register_readout)
 		econfig.reg_read = sun8i_sid_read_by_reg;
+	else if (cfg->native_endian)
+		econfig.reg_read = sunxi_sid_read_native;
 	else
 		econfig.reg_read = sunxi_sid_read;
 	econfig.priv = sid;
+
 	nvmem = devm_nvmem_register(dev, &econfig);
 	if (IS_ERR(nvmem))
 		return PTR_ERR(nvmem);