diff mbox series

[v3,1/4] arm64: compat: Alloc separate pages for vectors and sigpage

Message ID 20190402162757.13491-2-vincenzo.frascino@arm.com (mailing list archive)
State New, archived
Headers show
Series arm64: compat: Add kuser helpers config option | expand

Commit Message

Vincenzo Frascino April 2, 2019, 4:27 p.m. UTC
In the current implementation AArch32 installs a special page called
"[vectors]" that contains sigreturn trampolines and kuser helpers,
and this is done at fixed address specified by the kuser helpers ABI.

Having sigreturn trampolines and kuser helpers in the same page, makes
difficult to maintain compatibility with arm because it makes not
possible to disable kuser helpers.

Address the problem creating separate pages for vectors and sigpage in
a similar fashion to what happens today on arm.

Change as well the meaning of mm->context.vdso for AArch32 compat since
it now points to sigpage and not to vectors anymore in order to make
simpler the implementation of the signal handling (the address of
sigpage is randomized).

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm64/include/asm/elf.h       |   6 +-
 arch/arm64/include/asm/processor.h |   4 +-
 arch/arm64/include/asm/signal32.h  |   2 -
 arch/arm64/kernel/signal32.c       |   5 +-
 arch/arm64/kernel/vdso.c           | 121 ++++++++++++++++++++++-------
 5 files changed, 102 insertions(+), 36 deletions(-)

Comments

Will Deacon April 10, 2019, 6:10 p.m. UTC | #1
On Tue, Apr 02, 2019 at 05:27:54PM +0100, Vincenzo Frascino wrote:
> In the current implementation AArch32 installs a special page called
> "[vectors]" that contains sigreturn trampolines and kuser helpers,

Doesn't make sense. How about:

"For AArch32 tasks, we install a special "[vectors]" page that contains
the sigreturn trampolines and kuser helpers."

> and this is done at fixed address specified by the kuser helpers ABI.

which is mapped at a fixed address...

> Having sigreturn trampolines and kuser helpers in the same page, makes
> difficult to maintain compatibility with arm because it makes not
> possible to disable kuser helpers.

Replace with:

"Having the sigreturn trampolines in the same page as the kuser helpers
 makes it impossible to disable the kuser helpers independently."

> Address the problem creating separate pages for vectors and sigpage in
> a similar fashion to what happens today on arm.

"Follow the Arm implementation, by moving the signal trampolines out of
 the "[vectors]" page and into their own "[sigpage]"".

> Change as well the meaning of mm->context.vdso for AArch32 compat since
> it now points to sigpage and not to vectors anymore in order to make
> simpler the implementation of the signal handling (the address of
> sigpage is randomized).

This is an implementation detail and can be dropped.

> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will.deacon@arm.com>
> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
> ---
>  arch/arm64/include/asm/elf.h       |   6 +-
>  arch/arm64/include/asm/processor.h |   4 +-
>  arch/arm64/include/asm/signal32.h  |   2 -
>  arch/arm64/kernel/signal32.c       |   5 +-
>  arch/arm64/kernel/vdso.c           | 121 ++++++++++++++++++++++-------
>  5 files changed, 102 insertions(+), 36 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
> index 6adc1a90e7e6..355d120b78cb 100644
> --- a/arch/arm64/include/asm/elf.h
> +++ b/arch/arm64/include/asm/elf.h
> @@ -214,10 +214,10 @@ typedef compat_elf_greg_t		compat_elf_gregset_t[COMPAT_ELF_NGREG];
>  	set_thread_flag(TIF_32BIT);					\
>   })
>  #define COMPAT_ARCH_DLINFO
> -extern int aarch32_setup_vectors_page(struct linux_binprm *bprm,
> -				      int uses_interp);
> +extern int aarch32_setup_additional_pages(struct linux_binprm *bprm,
> +					  int uses_interp);
>  #define compat_arch_setup_additional_pages \
> -					aarch32_setup_vectors_page
> +					aarch32_setup_additional_pages
>  
>  #endif /* CONFIG_COMPAT */
>  
> diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
> index 5d9ce62bdebd..07c873fce961 100644
> --- a/arch/arm64/include/asm/processor.h
> +++ b/arch/arm64/include/asm/processor.h
> @@ -78,9 +78,9 @@
>  #endif /* CONFIG_ARM64_FORCE_52BIT */
>  
>  #ifdef CONFIG_COMPAT
> -#define AARCH32_VECTORS_BASE	0xffff0000
> +#define AARCH32_KUSER_BASE	0xffff0000
>  #define STACK_TOP		(test_thread_flag(TIF_32BIT) ? \
> -				AARCH32_VECTORS_BASE : STACK_TOP_MAX)
> +				AARCH32_KUSER_BASE : STACK_TOP_MAX)
>  #else
>  #define STACK_TOP		STACK_TOP_MAX
>  #endif /* CONFIG_COMPAT */
> diff --git a/arch/arm64/include/asm/signal32.h b/arch/arm64/include/asm/signal32.h
> index 81abea0b7650..58e288aaf0ba 100644
> --- a/arch/arm64/include/asm/signal32.h
> +++ b/arch/arm64/include/asm/signal32.h
> @@ -20,8 +20,6 @@
>  #ifdef CONFIG_COMPAT
>  #include <linux/compat.h>
>  
> -#define AARCH32_KERN_SIGRET_CODE_OFFSET	0x500
> -
>  int compat_setup_frame(int usig, struct ksignal *ksig, sigset_t *set,
>  		       struct pt_regs *regs);
>  int compat_setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
> diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
> index cb7800acd19f..3846a1b710b5 100644
> --- a/arch/arm64/kernel/signal32.c
> +++ b/arch/arm64/kernel/signal32.c
> @@ -379,6 +379,7 @@ static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
>  	compat_ulong_t retcode;
>  	compat_ulong_t spsr = regs->pstate & ~(PSR_f | PSR_AA32_E_BIT);
>  	int thumb;
> +	void *sigreturn_base;
>  
>  	/* Check if the handler is written for ARM or Thumb */
>  	thumb = handler & 1;
> @@ -399,12 +400,12 @@ static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
>  	} else {
>  		/* Set up sigreturn pointer */
>  		unsigned int idx = thumb << 1;
> +		sigreturn_base = current->mm->context.vdso;
>  
>  		if (ka->sa.sa_flags & SA_SIGINFO)
>  			idx += 3;
>  
> -		retcode = AARCH32_VECTORS_BASE +
> -			  AARCH32_KERN_SIGRET_CODE_OFFSET +
> +		retcode = ptr_to_compat(sigreturn_base) +
>  			  (idx << 2) + thumb;
>  	}
>  
> diff --git a/arch/arm64/kernel/vdso.c b/arch/arm64/kernel/vdso.c
> index 2d419006ad43..16f8fce5c501 100644
> --- a/arch/arm64/kernel/vdso.c
> +++ b/arch/arm64/kernel/vdso.c
> @@ -1,5 +1,7 @@
>  /*
> - * VDSO implementation for AArch64 and vector page setup for AArch32.
> + * VDSO implementation for AArch64 and for AArch32:
> + * AArch64: vDSO implementation contains pages setup and data page update.
> + * AArch32: vDSO implementation contains sigreturn and kuser pages setup.
>   *
>   * Copyright (C) 2012 ARM Limited
>   *
> @@ -53,61 +55,126 @@ struct vdso_data *vdso_data = &vdso_data_store.data;
>  /*
>   * Create and map the vectors page for AArch32 tasks.
>   */
> -static struct page *vectors_page[1] __ro_after_init;
> +/*
> + * aarch32_vdso_pages:
> + * 0 - kuser helpers
> + * 1 - sigreturn code
> + */
> +#define C_VECTORS	0

C_KUSER might make more sense, and is consistent with AARCH32_KUSER_BASE.

> +#define C_SIGPAGE	1
> +#define C_PAGES		(C_SIGPAGE + 1)
> +static struct page *aarch32_vdso_pages[C_PAGES] __ro_after_init;
> +static const struct vm_special_mapping aarch32_vdso_spec[C_PAGES] = {
> +	{
> +		/* Must be named [vectors] for compatibility with arm. */
> +		.name	= "[vectors]",
> +		.pages	= &aarch32_vdso_pages[C_VECTORS],
> +	},
> +	{
> +		/* Must be named [sigpage] for compatibility with arm. */
> +		.name	= "[sigpage]",
> +		.pages	= &aarch32_vdso_pages[C_SIGPAGE],
> +	},
> +};
>  
> -static int __init alloc_vectors_page(void)
> +static int __init aarch32_alloc_vdso_pages(void)

Premature renaming of the function?

>  {
>  	extern char __kuser_helper_start[], __kuser_helper_end[];
>  	extern char __aarch32_sigret_code_start[], __aarch32_sigret_code_end[];
>  
>  	int kuser_sz = __kuser_helper_end - __kuser_helper_start;
>  	int sigret_sz = __aarch32_sigret_code_end - __aarch32_sigret_code_start;
> -	unsigned long vpage;
> +	unsigned long vdso_pages[C_PAGES];
>  
> -	vpage = get_zeroed_page(GFP_ATOMIC);
> +	vdso_pages[C_VECTORS] = get_zeroed_page(GFP_ATOMIC);
> +	if (!vdso_pages[C_VECTORS])
> +		return -ENOMEM;
>  
> -	if (!vpage)
> +	vdso_pages[C_SIGPAGE] = get_zeroed_page(GFP_ATOMIC);
> +	if (!vdso_pages[C_SIGPAGE])
>  		return -ENOMEM;

You leak the kuser page if this fails.

>  	/* kuser helpers */
> -	memcpy((void *)vpage + 0x1000 - kuser_sz, __kuser_helper_start,
> -		kuser_sz);
> +	memcpy((void *)(vdso_pages[C_VECTORS] + 0x1000 - kuser_sz),
> +	       __kuser_helper_start,
> +	       kuser_sz);
>  
>  	/* sigreturn code */
> -	memcpy((void *)vpage + AARCH32_KERN_SIGRET_CODE_OFFSET,
> -               __aarch32_sigret_code_start, sigret_sz);
> +	memcpy((void *)vdso_pages[C_SIGPAGE],
> +	       __aarch32_sigret_code_start,
> +	       sigret_sz);
>  
> -	flush_icache_range(vpage, vpage + PAGE_SIZE);
> -	vectors_page[0] = virt_to_page(vpage);
> +	flush_icache_range(vdso_pages[C_VECTORS],
> +			   vdso_pages[C_VECTORS] + PAGE_SIZE);
> +	flush_icache_range(vdso_pages[C_SIGPAGE],
> +			   vdso_pages[C_SIGPAGE] + PAGE_SIZE);
> +
> +	aarch32_vdso_pages[C_VECTORS] = virt_to_page(vdso_pages[C_VECTORS]);
> +	aarch32_vdso_pages[C_SIGPAGE] = virt_to_page(vdso_pages[C_SIGPAGE]);
>  
>  	return 0;
>  }
> -arch_initcall(alloc_vectors_page);
> +arch_initcall(aarch32_alloc_vdso_pages);
>  
> -int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp)
> +static int aarch32_kuser_helpers_setup(struct mm_struct *mm)
>  {
> -	struct mm_struct *mm = current->mm;
> -	unsigned long addr = AARCH32_VECTORS_BASE;
> -	static const struct vm_special_mapping spec = {
> -		.name	= "[vectors]",
> -		.pages	= vectors_page,
> +	void *ret;
> +
> +	/* The kuser helpers must be mapped at the ABI-defined high address */
> +	ret = _install_special_mapping(mm, AARCH32_KUSER_BASE, PAGE_SIZE,
> +				       VM_READ | VM_EXEC |
> +				       VM_MAYREAD | VM_MAYEXEC,

How come you don't need VM_MAYWRITE here...

> +	/*
> +	 * VM_MAYWRITE is required to allow gdb to Copy-on-Write and
> +	 * set breakpoints.
> +	 */
>  	ret = _install_special_mapping(mm, addr, PAGE_SIZE,
> -				       VM_READ|VM_EXEC|VM_MAYREAD|VM_MAYEXEC,
> -				       &spec);
> +				       VM_READ | VM_EXEC | VM_MAYREAD |
> +				       VM_MAYWRITE | VM_MAYEXEC,
> +				       &aarch32_vdso_spec[C_SIGPAGE]);

... but you introduce it here? Also, shouldn't this be a separate change
so it can be treated as a fix?

Will
Vincenzo Frascino April 12, 2019, 11:08 a.m. UTC | #2
Hi Will,

thank you for your review.

On 10/04/2019 19:10, Will Deacon wrote:
> On Tue, Apr 02, 2019 at 05:27:54PM +0100, Vincenzo Frascino wrote:
>> In the current implementation AArch32 installs a special page called
>> "[vectors]" that contains sigreturn trampolines and kuser helpers,
> 
> Doesn't make sense. How about:
> 
> "For AArch32 tasks, we install a special "[vectors]" page that contains
> the sigreturn trampolines and kuser helpers."
> 
>> and this is done at fixed address specified by the kuser helpers ABI.
> 
> which is mapped at a fixed address...
> 
>> Having sigreturn trampolines and kuser helpers in the same page, makes
>> difficult to maintain compatibility with arm because it makes not
>> possible to disable kuser helpers.
> 
> Replace with:
> 
> "Having the sigreturn trampolines in the same page as the kuser helpers
>  makes it impossible to disable the kuser helpers independently."
> 
>> Address the problem creating separate pages for vectors and sigpage in
>> a similar fashion to what happens today on arm.
> 
> "Follow the Arm implementation, by moving the signal trampolines out of
>  the "[vectors]" page and into their own "[sigpage]"".
> 
>> Change as well the meaning of mm->context.vdso for AArch32 compat since
>> it now points to sigpage and not to vectors anymore in order to make
>> simpler the implementation of the signal handling (the address of
>> sigpage is randomized).
> 
> This is an implementation detail and can be dropped.
> 

Thanks for this, I will rework my patch description in v4.

>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Will Deacon <will.deacon@arm.com>
>> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
>> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
>> ---
>>  arch/arm64/include/asm/elf.h       |   6 +-
>>  arch/arm64/include/asm/processor.h |   4 +-
>>  arch/arm64/include/asm/signal32.h  |   2 -
>>  arch/arm64/kernel/signal32.c       |   5 +-
>>  arch/arm64/kernel/vdso.c           | 121 ++++++++++++++++++++++-------
>>  5 files changed, 102 insertions(+), 36 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
>> index 6adc1a90e7e6..355d120b78cb 100644
>> --- a/arch/arm64/include/asm/elf.h
>> +++ b/arch/arm64/include/asm/elf.h
>> @@ -214,10 +214,10 @@ typedef compat_elf_greg_t		compat_elf_gregset_t[COMPAT_ELF_NGREG];
>>  	set_thread_flag(TIF_32BIT);					\
>>   })
>>  #define COMPAT_ARCH_DLINFO
>> -extern int aarch32_setup_vectors_page(struct linux_binprm *bprm,
>> -				      int uses_interp);
>> +extern int aarch32_setup_additional_pages(struct linux_binprm *bprm,
>> +					  int uses_interp);
>>  #define compat_arch_setup_additional_pages \
>> -					aarch32_setup_vectors_page
>> +					aarch32_setup_additional_pages
>>  
>>  #endif /* CONFIG_COMPAT */
>>  
>> diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
>> index 5d9ce62bdebd..07c873fce961 100644
>> --- a/arch/arm64/include/asm/processor.h
>> +++ b/arch/arm64/include/asm/processor.h
>> @@ -78,9 +78,9 @@
>>  #endif /* CONFIG_ARM64_FORCE_52BIT */
>>  
>>  #ifdef CONFIG_COMPAT
>> -#define AARCH32_VECTORS_BASE	0xffff0000
>> +#define AARCH32_KUSER_BASE	0xffff0000
>>  #define STACK_TOP		(test_thread_flag(TIF_32BIT) ? \
>> -				AARCH32_VECTORS_BASE : STACK_TOP_MAX)
>> +				AARCH32_KUSER_BASE : STACK_TOP_MAX)
>>  #else
>>  #define STACK_TOP		STACK_TOP_MAX
>>  #endif /* CONFIG_COMPAT */
>> diff --git a/arch/arm64/include/asm/signal32.h b/arch/arm64/include/asm/signal32.h
>> index 81abea0b7650..58e288aaf0ba 100644
>> --- a/arch/arm64/include/asm/signal32.h
>> +++ b/arch/arm64/include/asm/signal32.h
>> @@ -20,8 +20,6 @@
>>  #ifdef CONFIG_COMPAT
>>  #include <linux/compat.h>
>>  
>> -#define AARCH32_KERN_SIGRET_CODE_OFFSET	0x500
>> -
>>  int compat_setup_frame(int usig, struct ksignal *ksig, sigset_t *set,
>>  		       struct pt_regs *regs);
>>  int compat_setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
>> diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
>> index cb7800acd19f..3846a1b710b5 100644
>> --- a/arch/arm64/kernel/signal32.c
>> +++ b/arch/arm64/kernel/signal32.c
>> @@ -379,6 +379,7 @@ static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
>>  	compat_ulong_t retcode;
>>  	compat_ulong_t spsr = regs->pstate & ~(PSR_f | PSR_AA32_E_BIT);
>>  	int thumb;
>> +	void *sigreturn_base;
>>  
>>  	/* Check if the handler is written for ARM or Thumb */
>>  	thumb = handler & 1;
>> @@ -399,12 +400,12 @@ static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
>>  	} else {
>>  		/* Set up sigreturn pointer */
>>  		unsigned int idx = thumb << 1;
>> +		sigreturn_base = current->mm->context.vdso;
>>  
>>  		if (ka->sa.sa_flags & SA_SIGINFO)
>>  			idx += 3;
>>  
>> -		retcode = AARCH32_VECTORS_BASE +
>> -			  AARCH32_KERN_SIGRET_CODE_OFFSET +
>> +		retcode = ptr_to_compat(sigreturn_base) +
>>  			  (idx << 2) + thumb;
>>  	}
>>  
>> diff --git a/arch/arm64/kernel/vdso.c b/arch/arm64/kernel/vdso.c
>> index 2d419006ad43..16f8fce5c501 100644
>> --- a/arch/arm64/kernel/vdso.c
>> +++ b/arch/arm64/kernel/vdso.c
>> @@ -1,5 +1,7 @@
>>  /*
>> - * VDSO implementation for AArch64 and vector page setup for AArch32.
>> + * VDSO implementation for AArch64 and for AArch32:
>> + * AArch64: vDSO implementation contains pages setup and data page update.
>> + * AArch32: vDSO implementation contains sigreturn and kuser pages setup.
>>   *
>>   * Copyright (C) 2012 ARM Limited
>>   *
>> @@ -53,61 +55,126 @@ struct vdso_data *vdso_data = &vdso_data_store.data;
>>  /*
>>   * Create and map the vectors page for AArch32 tasks.
>>   */
>> -static struct page *vectors_page[1] __ro_after_init;
>> +/*
>> + * aarch32_vdso_pages:
>> + * 0 - kuser helpers
>> + * 1 - sigreturn code
>> + */
>> +#define C_VECTORS	0
> 
> C_KUSER might make more sense, and is consistent with AARCH32_KUSER_BASE.
>

C_VECTORS seems consistent with the name of the page it refers to.

>> +#define C_SIGPAGE	1
>> +#define C_PAGES		(C_SIGPAGE + 1)
>> +static struct page *aarch32_vdso_pages[C_PAGES] __ro_after_init;
>> +static const struct vm_special_mapping aarch32_vdso_spec[C_PAGES] = {
>> +	{
>> +		/* Must be named [vectors] for compatibility with arm. */
>> +		.name	= "[vectors]",
>> +		.pages	= &aarch32_vdso_pages[C_VECTORS],
>> +	},
>> +	{
>> +		/* Must be named [sigpage] for compatibility with arm. */
>> +		.name	= "[sigpage]",
>> +		.pages	= &aarch32_vdso_pages[C_SIGPAGE],
>> +	},
>> +};
>>  
>> -static int __init alloc_vectors_page(void)
>> +static int __init aarch32_alloc_vdso_pages(void)
> 
> Premature renaming of the function?
> 

I named/renamed everything that refers to aarch32 as "aarch32_" to make it
easier to follow the code flow.

>>  {
>>  	extern char __kuser_helper_start[], __kuser_helper_end[];
>>  	extern char __aarch32_sigret_code_start[], __aarch32_sigret_code_end[];
>>  
>>  	int kuser_sz = __kuser_helper_end - __kuser_helper_start;
>>  	int sigret_sz = __aarch32_sigret_code_end - __aarch32_sigret_code_start;
>> -	unsigned long vpage;
>> +	unsigned long vdso_pages[C_PAGES];
>>  
>> -	vpage = get_zeroed_page(GFP_ATOMIC);
>> +	vdso_pages[C_VECTORS] = get_zeroed_page(GFP_ATOMIC);
>> +	if (!vdso_pages[C_VECTORS])
>> +		return -ENOMEM;
>>  
>> -	if (!vpage)
>> +	vdso_pages[C_SIGPAGE] = get_zeroed_page(GFP_ATOMIC);
>> +	if (!vdso_pages[C_SIGPAGE])
>>  		return -ENOMEM;
> 
> You leak the kuser page if this fails.
> 

Thanks for this, I will definitely fix it in v4.

>>  	/* kuser helpers */
>> -	memcpy((void *)vpage + 0x1000 - kuser_sz, __kuser_helper_start,
>> -		kuser_sz);
>> +	memcpy((void *)(vdso_pages[C_VECTORS] + 0x1000 - kuser_sz),
>> +	       __kuser_helper_start,
>> +	       kuser_sz);
>>  
>>  	/* sigreturn code */
>> -	memcpy((void *)vpage + AARCH32_KERN_SIGRET_CODE_OFFSET,
>> -               __aarch32_sigret_code_start, sigret_sz);
>> +	memcpy((void *)vdso_pages[C_SIGPAGE],
>> +	       __aarch32_sigret_code_start,
>> +	       sigret_sz);
>>  
>> -	flush_icache_range(vpage, vpage + PAGE_SIZE);
>> -	vectors_page[0] = virt_to_page(vpage);
>> +	flush_icache_range(vdso_pages[C_VECTORS],
>> +			   vdso_pages[C_VECTORS] + PAGE_SIZE);
>> +	flush_icache_range(vdso_pages[C_SIGPAGE],
>> +			   vdso_pages[C_SIGPAGE] + PAGE_SIZE);
>> +
>> +	aarch32_vdso_pages[C_VECTORS] = virt_to_page(vdso_pages[C_VECTORS]);
>> +	aarch32_vdso_pages[C_SIGPAGE] = virt_to_page(vdso_pages[C_SIGPAGE]);
>>  
>>  	return 0;
>>  }
>> -arch_initcall(alloc_vectors_page);
>> +arch_initcall(aarch32_alloc_vdso_pages);
>>  
>> -int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp)
>> +static int aarch32_kuser_helpers_setup(struct mm_struct *mm)
>>  {
>> -	struct mm_struct *mm = current->mm;
>> -	unsigned long addr = AARCH32_VECTORS_BASE;
>> -	static const struct vm_special_mapping spec = {
>> -		.name	= "[vectors]",
>> -		.pages	= vectors_page,
>> +	void *ret;
>> +
>> +	/* The kuser helpers must be mapped at the ABI-defined high address */
>> +	ret = _install_special_mapping(mm, AARCH32_KUSER_BASE, PAGE_SIZE,
>> +				       VM_READ | VM_EXEC |
>> +				       VM_MAYREAD | VM_MAYEXEC,
> 
> How come you don't need VM_MAYWRITE here...
> 

This is to keep it consistent with what the arm (32 bit) implementation does.

My understanding is that the kuser code is executed in user mode for efficiency
reasons but it is too close to the kernel to be implemented in user libraries
and that the kernel can change its internal implementation from version to
version as far as it guarantees the "interface" (entry points and results).
Based on this gdb should not need to put a breakpoint inside the kuser helpers code.

And if we consider as well that the fixed address nature of the helpers could be
used from ROP authors during the creation of exploits probably we want to
prevent gdb to set a breakpoint there hence the proposed patch does not contain
VM_MAYWRITE.

I had a look to arm implementation and it seems the it defines the vector page
as READONLY_EXEC and there is no VM_MAYWRITE in the vm_flags.

I could extend the comment accordingly.

>> +	/*
>> +	 * VM_MAYWRITE is required to allow gdb to Copy-on-Write and
>> +	 * set breakpoints.
>> +	 */
>>  	ret = _install_special_mapping(mm, addr, PAGE_SIZE,
>> -				       VM_READ|VM_EXEC|VM_MAYREAD|VM_MAYEXEC,
>> -				       &spec);
>> +				       VM_READ | VM_EXEC | VM_MAYREAD |
>> +				       VM_MAYWRITE | VM_MAYEXEC,
>> +				       &aarch32_vdso_spec[C_SIGPAGE]);
> 
> ... but you introduce it here?Also, shouldn't this be a separate change
> so it can be treated as a fix?

This is again to keep it consistent with what the arm implementation does.

Since the separation (vectors/sigpage) has been added in this patch, I am not
sure on how we can treat this change as a separate patch, at least based on what
I mentioned above. Could you please explain?

> 
> Will
>
Will Deacon April 12, 2019, 11:55 a.m. UTC | #3
[+rmk]

On Fri, Apr 12, 2019 at 12:08:30PM +0100, Vincenzo Frascino wrote:
> On 10/04/2019 19:10, Will Deacon wrote:
> > On Tue, Apr 02, 2019 at 05:27:54PM +0100, Vincenzo Frascino wrote:
> >> diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
> >> index 5d9ce62bdebd..07c873fce961 100644
> >> --- a/arch/arm64/include/asm/processor.h
> >> +++ b/arch/arm64/include/asm/processor.h
> >> @@ -78,9 +78,9 @@
> >>  #endif /* CONFIG_ARM64_FORCE_52BIT */
> >>  
> >>  #ifdef CONFIG_COMPAT
> >> -#define AARCH32_VECTORS_BASE	0xffff0000
> >> +#define AARCH32_KUSER_BASE	0xffff0000
> >>  #define STACK_TOP		(test_thread_flag(TIF_32BIT) ? \
> >> -				AARCH32_VECTORS_BASE : STACK_TOP_MAX)
> >> +				AARCH32_KUSER_BASE : STACK_TOP_MAX)
> >>  #else
> >>  #define STACK_TOP		STACK_TOP_MAX
> >>  #endif /* CONFIG_COMPAT */
> >> diff --git a/arch/arm64/include/asm/signal32.h b/arch/arm64/include/asm/signal32.h
> >> index 81abea0b7650..58e288aaf0ba 100644
> >> --- a/arch/arm64/include/asm/signal32.h
> >> +++ b/arch/arm64/include/asm/signal32.h
> >> @@ -20,8 +20,6 @@
> >>  #ifdef CONFIG_COMPAT
> >>  #include <linux/compat.h>
> >>  
> >> -#define AARCH32_KERN_SIGRET_CODE_OFFSET	0x500
> >> -
> >>  int compat_setup_frame(int usig, struct ksignal *ksig, sigset_t *set,
> >>  		       struct pt_regs *regs);
> >>  int compat_setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
> >> diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
> >> index cb7800acd19f..3846a1b710b5 100644
> >> --- a/arch/arm64/kernel/signal32.c
> >> +++ b/arch/arm64/kernel/signal32.c
> >> @@ -379,6 +379,7 @@ static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
> >>  	compat_ulong_t retcode;
> >>  	compat_ulong_t spsr = regs->pstate & ~(PSR_f | PSR_AA32_E_BIT);
> >>  	int thumb;
> >> +	void *sigreturn_base;
> >>  
> >>  	/* Check if the handler is written for ARM or Thumb */
> >>  	thumb = handler & 1;
> >> @@ -399,12 +400,12 @@ static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
> >>  	} else {
> >>  		/* Set up sigreturn pointer */
> >>  		unsigned int idx = thumb << 1;
> >> +		sigreturn_base = current->mm->context.vdso;
> >>  
> >>  		if (ka->sa.sa_flags & SA_SIGINFO)
> >>  			idx += 3;
> >>  
> >> -		retcode = AARCH32_VECTORS_BASE +
> >> -			  AARCH32_KERN_SIGRET_CODE_OFFSET +
> >> +		retcode = ptr_to_compat(sigreturn_base) +
> >>  			  (idx << 2) + thumb;
> >>  	}
> >>  
> >> diff --git a/arch/arm64/kernel/vdso.c b/arch/arm64/kernel/vdso.c
> >> index 2d419006ad43..16f8fce5c501 100644
> >> --- a/arch/arm64/kernel/vdso.c
> >> +++ b/arch/arm64/kernel/vdso.c
> >> @@ -1,5 +1,7 @@
> >>  /*
> >> - * VDSO implementation for AArch64 and vector page setup for AArch32.
> >> + * VDSO implementation for AArch64 and for AArch32:
> >> + * AArch64: vDSO implementation contains pages setup and data page update.
> >> + * AArch32: vDSO implementation contains sigreturn and kuser pages setup.
> >>   *
> >>   * Copyright (C) 2012 ARM Limited
> >>   *
> >> @@ -53,61 +55,126 @@ struct vdso_data *vdso_data = &vdso_data_store.data;
> >>  /*
> >>   * Create and map the vectors page for AArch32 tasks.
> >>   */
> >> -static struct page *vectors_page[1] __ro_after_init;
> >> +/*
> >> + * aarch32_vdso_pages:
> >> + * 0 - kuser helpers
> >> + * 1 - sigreturn code
> >> + */
> >> +#define C_VECTORS	0
> > 
> > C_KUSER might make more sense, and is consistent with AARCH32_KUSER_BASE.
> >
> 
> C_VECTORS seems consistent with the name of the page it refers to.

Ok, then why change AARCH32_VECTORS_BASE? ;)

> >> -int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp)
> >> +static int aarch32_kuser_helpers_setup(struct mm_struct *mm)
> >>  {
> >> -	struct mm_struct *mm = current->mm;
> >> -	unsigned long addr = AARCH32_VECTORS_BASE;
> >> -	static const struct vm_special_mapping spec = {
> >> -		.name	= "[vectors]",
> >> -		.pages	= vectors_page,
> >> +	void *ret;
> >> +
> >> +	/* The kuser helpers must be mapped at the ABI-defined high address */
> >> +	ret = _install_special_mapping(mm, AARCH32_KUSER_BASE, PAGE_SIZE,
> >> +				       VM_READ | VM_EXEC |
> >> +				       VM_MAYREAD | VM_MAYEXEC,
> > 
> > How come you don't need VM_MAYWRITE here...
> > 
> 
> This is to keep it consistent with what the arm (32 bit) implementation does.
> 
> My understanding is that the kuser code is executed in user mode for efficiency
> reasons but it is too close to the kernel to be implemented in user libraries
> and that the kernel can change its internal implementation from version to
> version as far as it guarantees the "interface" (entry points and results).
> Based on this gdb should not need to put a breakpoint inside the kuser helpers code.

Hmm, but couldn't you apply the same reasoning to the sigpage?

[also, talking to Russell, he makes the very good point that you can't CoW
 the page containing the vectors because that would give userspace control
 over the vectors themselves!]

> And if we consider as well that the fixed address nature of the helpers could be
> used from ROP authors during the creation of exploits probably we want to
> prevent gdb to set a breakpoint there hence the proposed patch does not contain
> VM_MAYWRITE.

I'm not sure I buy the ROP angle... you need to GUP the thing to get the
write to happen. Maybe you could do it with a futex or something, but I'm
also not sure that's really a viable attack.

> I had a look to arm implementation and it seems the it defines the vector page
> as READONLY_EXEC and there is no VM_MAYWRITE in the vm_flags.
> 
> I could extend the comment accordingly.

I initially thought that the gate VMA would mean that VM_MAYWRITE was
implicit for GUP, but actually that's handled explicitly in get_gate_page():

	/* user gate pages are read-only */
	if (gup_flags & FOLL_WRITE)
		return -EFAULT;

so yes, I agree with you that this is consistent with 32-bit. What I'm not
sure about is why we need to CoW the sigpage. But I suppose being compatible
with 32-bit is the aim of the game, so this is all moot.

> >> +	/*
> >> +	 * VM_MAYWRITE is required to allow gdb to Copy-on-Write and
> >> +	 * set breakpoints.
> >> +	 */
> >>  	ret = _install_special_mapping(mm, addr, PAGE_SIZE,
> >> -				       VM_READ|VM_EXEC|VM_MAYREAD|VM_MAYEXEC,
> >> -				       &spec);
> >> +				       VM_READ | VM_EXEC | VM_MAYREAD |
> >> +				       VM_MAYWRITE | VM_MAYEXEC,
> >> +				       &aarch32_vdso_spec[C_SIGPAGE]);
> > 
> > ... but you introduce it here?Also, shouldn't this be a separate change
> > so it can be treated as a fix?
> 
> This is again to keep it consistent with what the arm implementation does.
> 
> Since the separation (vectors/sigpage) has been added in this patch, I am not
> sure on how we can treat this change as a separate patch, at least based on what
> I mentioned above. Could you please explain?

Sorry, I was getting ahead of myself with that. If we need to add
VM_MAYWRITE to the compat kuser helpers (which we could safely do on
64-bit), then we could do it as a fix. However, we don't need to do that
do please ignore my comment above.

Will
Vincenzo Frascino April 12, 2019, 1:28 p.m. UTC | #4
On 12/04/2019 12:55, Will Deacon wrote:
> [+rmk]
> 
> On Fri, Apr 12, 2019 at 12:08:30PM +0100, Vincenzo Frascino wrote:
>> On 10/04/2019 19:10, Will Deacon wrote:
>>> On Tue, Apr 02, 2019 at 05:27:54PM +0100, Vincenzo Frascino wrote:
>>>> diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
>>>> index 5d9ce62bdebd..07c873fce961 100644
>>>> --- a/arch/arm64/include/asm/processor.h
>>>> +++ b/arch/arm64/include/asm/processor.h
>>>> @@ -78,9 +78,9 @@
>>>>  #endif /* CONFIG_ARM64_FORCE_52BIT */
>>>>  
>>>>  #ifdef CONFIG_COMPAT
>>>> -#define AARCH32_VECTORS_BASE	0xffff0000
>>>> +#define AARCH32_KUSER_BASE	0xffff0000
>>>>  #define STACK_TOP		(test_thread_flag(TIF_32BIT) ? \
>>>> -				AARCH32_VECTORS_BASE : STACK_TOP_MAX)
>>>> +				AARCH32_KUSER_BASE : STACK_TOP_MAX)
>>>>  #else
>>>>  #define STACK_TOP		STACK_TOP_MAX
>>>>  #endif /* CONFIG_COMPAT */
>>>> diff --git a/arch/arm64/include/asm/signal32.h b/arch/arm64/include/asm/signal32.h
>>>> index 81abea0b7650..58e288aaf0ba 100644
>>>> --- a/arch/arm64/include/asm/signal32.h
>>>> +++ b/arch/arm64/include/asm/signal32.h
>>>> @@ -20,8 +20,6 @@
>>>>  #ifdef CONFIG_COMPAT
>>>>  #include <linux/compat.h>
>>>>  
>>>> -#define AARCH32_KERN_SIGRET_CODE_OFFSET	0x500
>>>> -
>>>>  int compat_setup_frame(int usig, struct ksignal *ksig, sigset_t *set,
>>>>  		       struct pt_regs *regs);
>>>>  int compat_setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
>>>> diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
>>>> index cb7800acd19f..3846a1b710b5 100644
>>>> --- a/arch/arm64/kernel/signal32.c
>>>> +++ b/arch/arm64/kernel/signal32.c
>>>> @@ -379,6 +379,7 @@ static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
>>>>  	compat_ulong_t retcode;
>>>>  	compat_ulong_t spsr = regs->pstate & ~(PSR_f | PSR_AA32_E_BIT);
>>>>  	int thumb;
>>>> +	void *sigreturn_base;
>>>>  
>>>>  	/* Check if the handler is written for ARM or Thumb */
>>>>  	thumb = handler & 1;
>>>> @@ -399,12 +400,12 @@ static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
>>>>  	} else {
>>>>  		/* Set up sigreturn pointer */
>>>>  		unsigned int idx = thumb << 1;
>>>> +		sigreturn_base = current->mm->context.vdso;
>>>>  
>>>>  		if (ka->sa.sa_flags & SA_SIGINFO)
>>>>  			idx += 3;
>>>>  
>>>> -		retcode = AARCH32_VECTORS_BASE +
>>>> -			  AARCH32_KERN_SIGRET_CODE_OFFSET +
>>>> +		retcode = ptr_to_compat(sigreturn_base) +
>>>>  			  (idx << 2) + thumb;
>>>>  	}
>>>>  
>>>> diff --git a/arch/arm64/kernel/vdso.c b/arch/arm64/kernel/vdso.c
>>>> index 2d419006ad43..16f8fce5c501 100644
>>>> --- a/arch/arm64/kernel/vdso.c
>>>> +++ b/arch/arm64/kernel/vdso.c
>>>> @@ -1,5 +1,7 @@
>>>>  /*
>>>> - * VDSO implementation for AArch64 and vector page setup for AArch32.
>>>> + * VDSO implementation for AArch64 and for AArch32:
>>>> + * AArch64: vDSO implementation contains pages setup and data page update.
>>>> + * AArch32: vDSO implementation contains sigreturn and kuser pages setup.
>>>>   *
>>>>   * Copyright (C) 2012 ARM Limited
>>>>   *
>>>> @@ -53,61 +55,126 @@ struct vdso_data *vdso_data = &vdso_data_store.data;
>>>>  /*
>>>>   * Create and map the vectors page for AArch32 tasks.
>>>>   */
>>>> -static struct page *vectors_page[1] __ro_after_init;
>>>> +/*
>>>> + * aarch32_vdso_pages:
>>>> + * 0 - kuser helpers
>>>> + * 1 - sigreturn code
>>>> + */
>>>> +#define C_VECTORS	0
>>>
>>> C_KUSER might make more sense, and is consistent with AARCH32_KUSER_BASE.
>>>
>>
>> C_VECTORS seems consistent with the name of the page it refers to.
> 
> Ok, then why change AARCH32_VECTORS_BASE? ;)
> 

Right! ;) I will revert back to AARCH32_VECTORS_BASE to keep it consistent.

>>>> -int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp)
>>>> +static int aarch32_kuser_helpers_setup(struct mm_struct *mm)
>>>>  {
>>>> -	struct mm_struct *mm = current->mm;
>>>> -	unsigned long addr = AARCH32_VECTORS_BASE;
>>>> -	static const struct vm_special_mapping spec = {
>>>> -		.name	= "[vectors]",
>>>> -		.pages	= vectors_page,
>>>> +	void *ret;
>>>> +
>>>> +	/* The kuser helpers must be mapped at the ABI-defined high address */
>>>> +	ret = _install_special_mapping(mm, AARCH32_KUSER_BASE, PAGE_SIZE,
>>>> +				       VM_READ | VM_EXEC |
>>>> +				       VM_MAYREAD | VM_MAYEXEC,
>>>
>>> How come you don't need VM_MAYWRITE here...
>>>
>>
>> This is to keep it consistent with what the arm (32 bit) implementation does.
>>
>> My understanding is that the kuser code is executed in user mode for efficiency
>> reasons but it is too close to the kernel to be implemented in user libraries
>> and that the kernel can change its internal implementation from version to
>> version as far as it guarantees the "interface" (entry points and results).
>> Based on this gdb should not need to put a breakpoint inside the kuser helpers code.
> 
> Hmm, but couldn't you apply the same reasoning to the sigpage?
> 

We could if it make sense for arm to change it accordingly, but for the moment I
would prefer to maintain consistency.

> [also, talking to Russell, he makes the very good point that you can't CoW
>  the page containing the vectors because that would give userspace control
>  over the vectors themselves!]
> 
>> And if we consider as well that the fixed address nature of the helpers could be
>> used from ROP authors during the creation of exploits probably we want to
>> prevent gdb to set a breakpoint there hence the proposed patch does not contain
>> VM_MAYWRITE.
> 
> I'm not sure I buy the ROP angle... you need to GUP the thing to get the
> write to happen. Maybe you could do it with a futex or something, but I'm
> also not sure that's really a viable attack.
> 
>> I had a look to arm implementation and it seems the it defines the vector page
>> as READONLY_EXEC and there is no VM_MAYWRITE in the vm_flags.
>>
>> I could extend the comment accordingly.
> 
> I initially thought that the gate VMA would mean that VM_MAYWRITE was
> implicit for GUP, but actually that's handled explicitly in get_gate_page():
> 
> 	/* user gate pages are read-only */
> 	if (gup_flags & FOLL_WRITE)
> 		return -EFAULT;
> 
> so yes, I agree with you that this is consistent with 32-bit. What I'm not
> sure about is why we need to CoW the sigpage. But I suppose being compatible
> with 32-bit is the aim of the game, so this is all moot.
> 

Agreed.

>>>> +	/*
>>>> +	 * VM_MAYWRITE is required to allow gdb to Copy-on-Write and
>>>> +	 * set breakpoints.
>>>> +	 */
>>>>  	ret = _install_special_mapping(mm, addr, PAGE_SIZE,
>>>> -				       VM_READ|VM_EXEC|VM_MAYREAD|VM_MAYEXEC,
>>>> -				       &spec);
>>>> +				       VM_READ | VM_EXEC | VM_MAYREAD |
>>>> +				       VM_MAYWRITE | VM_MAYEXEC,
>>>> +				       &aarch32_vdso_spec[C_SIGPAGE]);
>>>
>>> ... but you introduce it here?Also, shouldn't this be a separate change
>>> so it can be treated as a fix?
>>
>> This is again to keep it consistent with what the arm implementation does.
>>
>> Since the separation (vectors/sigpage) has been added in this patch, I am not
>> sure on how we can treat this change as a separate patch, at least based on what
>> I mentioned above. Could you please explain?
> 
> Sorry, I was getting ahead of myself with that. If we need to add
> VM_MAYWRITE to the compat kuser helpers (which we could safely do on
> 64-bit), then we could do it as a fix. However, we don't need to do that
> do please ignore my comment above.

Ok, I am going to re-post the set with the proposed changes.

> 
> Will
>
Russell King (Oracle) April 12, 2019, 1:30 p.m. UTC | #5
On Fri, Apr 12, 2019 at 12:55:07PM +0100, Will Deacon wrote:
> On Fri, Apr 12, 2019 at 12:08:30PM +0100, Vincenzo Frascino wrote:
> > On 10/04/2019 19:10, Will Deacon wrote:
> > > On Tue, Apr 02, 2019 at 05:27:54PM +0100, Vincenzo Frascino wrote:
> > >> +static int aarch32_kuser_helpers_setup(struct mm_struct *mm)
> > >>  {
> > >> -	struct mm_struct *mm = current->mm;
> > >> -	unsigned long addr = AARCH32_VECTORS_BASE;
> > >> -	static const struct vm_special_mapping spec = {
> > >> -		.name	= "[vectors]",
> > >> -		.pages	= vectors_page,
> > >> +	void *ret;
> > >> +
> > >> +	/* The kuser helpers must be mapped at the ABI-defined high address */
> > >> +	ret = _install_special_mapping(mm, AARCH32_KUSER_BASE, PAGE_SIZE,
> > >> +				       VM_READ | VM_EXEC |
> > >> +				       VM_MAYREAD | VM_MAYEXEC,
> > > 
> > > How come you don't need VM_MAYWRITE here...
> > > 
> > 
> > This is to keep it consistent with what the arm (32 bit) implementation does.
> > 
> > My understanding is that the kuser code is executed in user mode for efficiency
> > reasons but it is too close to the kernel to be implemented in user libraries
> > and that the kernel can change its internal implementation from version to
> > version as far as it guarantees the "interface" (entry points and results).
> > Based on this gdb should not need to put a breakpoint inside the kuser helpers code.

That is not the point at all.  The kuser code is to give userspace
independence of two things:

1. The CPU architecture it is running on (whether it be SMP or UP.)
2. The configuration of the kernel.
3. The method with which the per-thread value is obtained.
4. Atomic compare-exchange.

If it was only (1), then maybe it would be possible to have had the
userspace dynamic linker figure out which libraries to load, but (2),
(3) and (4) make that extremely complex to manage.

For (3), there are two ways to get the thread value:

1. Reading it from the userspace visible thread-private CPU register.
   This is fine for CPUs that implement it, but not all ARM CPUs
   implement this register.

2. Reading it from 0xffff0ffc, but only when the kernel is configured
   to write it there.

Which one works is a function of the kernel configuration (hence 2)
and the CPU capabilities.

For (4), there is a need to provide modern libraries with a way to
implement the cmpxchg() semantics.  This is easy in ARMv6+, as there
are the load-exclusive and store-exclusive instructions, but on
earlier architectures, there is only one atomic instruction which
is essentially an exchange operation - and that can't be used to
provide cmpxchg() semantics.

To work around that, there is code in the kuser page which provides
cmpxchg() semantics with the help of the kernel fixing things up if
an exception happens while userspace is executing that code.

Pushing that code into a library means that the kernel has to be aware,
whenever _any_ exception occurs, whether the PC is in that code, and
dealing with that efficiently if it isn't at a fixed address becomes
problematical - it's overhead incurred on almost every exception.
What's more is that the kernel has to be aware of the exact code so
it knows which range of PC values are required to be fixed up - since
the fixup involves changing the userland state, inappropriately changing
it will corrupt the program execution.

> Hmm, but couldn't you apply the same reasoning to the sigpage?

The sigpage is mapped in the userspace address range, and gdb has the
expectation that it can set breakpoints (which involves writing via
ptrace) to pages.  If we can't set breakpoints in the sigpage or vdso,
we end up losing control of the executable while trying to single step
it if the executable branches into such places - or gdb refuses to
step.

> [also, talking to Russell, he makes the very good point that you can't CoW
>  the page containing the vectors because that would give userspace control
>  over the vectors themselves!]

Yes, the vectors page is very special and gdb knows about it - it can't
be CoW'd because that would give userspace a way to modify the machine
vectors, thereby taking control of the machine in a privileged execution
state.

> > And if we consider as well that the fixed address nature of the helpers could be
> > used from ROP authors during the creation of exploits probably we want to
> > prevent gdb to set a breakpoint there hence the proposed patch does not contain
> > VM_MAYWRITE.
> 
> I'm not sure I buy the ROP angle... you need to GUP the thing to get the
> write to happen. Maybe you could do it with a futex or something, but I'm
> also not sure that's really a viable attack.

This came up on 32-bit.  Yes, ROP is a concern, that's why we changed
things around a bit a few years ago, and also made it possible to
disable the kuser helpers page entirely for maximum security - but
doing so has been biting people.  Last merge window, I merged a patch
which made the kernel state when such an executable was run, because
people were complaining that it was difficult to work out what was
happening.

ROP here is not about changing the data in the page, but exploiting the
instructions already there.  In the old says, most of the page was
filled with zeros, which meant you could branch before a kuser helper
and we'd execute "andeq r0, r0, r0" instructions until we hit one.
One of the changes to improve security was to fill the page with
instructions guaranteed to fault in either ARM or Thumb mode, thereby
reducing the possibility of ROP based attack on systems where the kuser
page was still present.

Another change that was made was to move the vector stubs out of the
vectors page into a page at 0xffff1000 which was inaccessible to the
user, so the only instructions userspace can see are the branches in
each of the vectors to the inaccessible code at 0xffff1000.  This also
has the effect of hiding the address of the kernel entry points from
userspace.

> > I had a look to arm implementation and it seems the it defines the vector page
> > as READONLY_EXEC and there is no VM_MAYWRITE in the vm_flags.
> > 
> > I could extend the comment accordingly.
> 
> I initially thought that the gate VMA would mean that VM_MAYWRITE was
> implicit for GUP, but actually that's handled explicitly in get_gate_page():
> 
> 	/* user gate pages are read-only */
> 	if (gup_flags & FOLL_WRITE)
> 		return -EFAULT;
> 
> so yes, I agree with you that this is consistent with 32-bit. What I'm not
> sure about is why we need to CoW the sigpage. But I suppose being compatible
> with 32-bit is the aim of the game, so this is all moot.

On 32-bit ARM, the "gate VMA" describes the vectors page mapping, not
the sigpage.  The sigpage is CoW-able to support gdb.
diff mbox series

Patch

diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index 6adc1a90e7e6..355d120b78cb 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -214,10 +214,10 @@  typedef compat_elf_greg_t		compat_elf_gregset_t[COMPAT_ELF_NGREG];
 	set_thread_flag(TIF_32BIT);					\
  })
 #define COMPAT_ARCH_DLINFO
-extern int aarch32_setup_vectors_page(struct linux_binprm *bprm,
-				      int uses_interp);
+extern int aarch32_setup_additional_pages(struct linux_binprm *bprm,
+					  int uses_interp);
 #define compat_arch_setup_additional_pages \
-					aarch32_setup_vectors_page
+					aarch32_setup_additional_pages
 
 #endif /* CONFIG_COMPAT */
 
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index 5d9ce62bdebd..07c873fce961 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -78,9 +78,9 @@ 
 #endif /* CONFIG_ARM64_FORCE_52BIT */
 
 #ifdef CONFIG_COMPAT
-#define AARCH32_VECTORS_BASE	0xffff0000
+#define AARCH32_KUSER_BASE	0xffff0000
 #define STACK_TOP		(test_thread_flag(TIF_32BIT) ? \
-				AARCH32_VECTORS_BASE : STACK_TOP_MAX)
+				AARCH32_KUSER_BASE : STACK_TOP_MAX)
 #else
 #define STACK_TOP		STACK_TOP_MAX
 #endif /* CONFIG_COMPAT */
diff --git a/arch/arm64/include/asm/signal32.h b/arch/arm64/include/asm/signal32.h
index 81abea0b7650..58e288aaf0ba 100644
--- a/arch/arm64/include/asm/signal32.h
+++ b/arch/arm64/include/asm/signal32.h
@@ -20,8 +20,6 @@ 
 #ifdef CONFIG_COMPAT
 #include <linux/compat.h>
 
-#define AARCH32_KERN_SIGRET_CODE_OFFSET	0x500
-
 int compat_setup_frame(int usig, struct ksignal *ksig, sigset_t *set,
 		       struct pt_regs *regs);
 int compat_setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
index cb7800acd19f..3846a1b710b5 100644
--- a/arch/arm64/kernel/signal32.c
+++ b/arch/arm64/kernel/signal32.c
@@ -379,6 +379,7 @@  static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
 	compat_ulong_t retcode;
 	compat_ulong_t spsr = regs->pstate & ~(PSR_f | PSR_AA32_E_BIT);
 	int thumb;
+	void *sigreturn_base;
 
 	/* Check if the handler is written for ARM or Thumb */
 	thumb = handler & 1;
@@ -399,12 +400,12 @@  static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
 	} else {
 		/* Set up sigreturn pointer */
 		unsigned int idx = thumb << 1;
+		sigreturn_base = current->mm->context.vdso;
 
 		if (ka->sa.sa_flags & SA_SIGINFO)
 			idx += 3;
 
-		retcode = AARCH32_VECTORS_BASE +
-			  AARCH32_KERN_SIGRET_CODE_OFFSET +
+		retcode = ptr_to_compat(sigreturn_base) +
 			  (idx << 2) + thumb;
 	}
 
diff --git a/arch/arm64/kernel/vdso.c b/arch/arm64/kernel/vdso.c
index 2d419006ad43..16f8fce5c501 100644
--- a/arch/arm64/kernel/vdso.c
+++ b/arch/arm64/kernel/vdso.c
@@ -1,5 +1,7 @@ 
 /*
- * VDSO implementation for AArch64 and vector page setup for AArch32.
+ * VDSO implementation for AArch64 and for AArch32:
+ * AArch64: vDSO implementation contains pages setup and data page update.
+ * AArch32: vDSO implementation contains sigreturn and kuser pages setup.
  *
  * Copyright (C) 2012 ARM Limited
  *
@@ -53,61 +55,126 @@  struct vdso_data *vdso_data = &vdso_data_store.data;
 /*
  * Create and map the vectors page for AArch32 tasks.
  */
-static struct page *vectors_page[1] __ro_after_init;
+/*
+ * aarch32_vdso_pages:
+ * 0 - kuser helpers
+ * 1 - sigreturn code
+ */
+#define C_VECTORS	0
+#define C_SIGPAGE	1
+#define C_PAGES		(C_SIGPAGE + 1)
+static struct page *aarch32_vdso_pages[C_PAGES] __ro_after_init;
+static const struct vm_special_mapping aarch32_vdso_spec[C_PAGES] = {
+	{
+		/* Must be named [vectors] for compatibility with arm. */
+		.name	= "[vectors]",
+		.pages	= &aarch32_vdso_pages[C_VECTORS],
+	},
+	{
+		/* Must be named [sigpage] for compatibility with arm. */
+		.name	= "[sigpage]",
+		.pages	= &aarch32_vdso_pages[C_SIGPAGE],
+	},
+};
 
-static int __init alloc_vectors_page(void)
+static int __init aarch32_alloc_vdso_pages(void)
 {
 	extern char __kuser_helper_start[], __kuser_helper_end[];
 	extern char __aarch32_sigret_code_start[], __aarch32_sigret_code_end[];
 
 	int kuser_sz = __kuser_helper_end - __kuser_helper_start;
 	int sigret_sz = __aarch32_sigret_code_end - __aarch32_sigret_code_start;
-	unsigned long vpage;
+	unsigned long vdso_pages[C_PAGES];
 
-	vpage = get_zeroed_page(GFP_ATOMIC);
+	vdso_pages[C_VECTORS] = get_zeroed_page(GFP_ATOMIC);
+	if (!vdso_pages[C_VECTORS])
+		return -ENOMEM;
 
-	if (!vpage)
+	vdso_pages[C_SIGPAGE] = get_zeroed_page(GFP_ATOMIC);
+	if (!vdso_pages[C_SIGPAGE])
 		return -ENOMEM;
 
 	/* kuser helpers */
-	memcpy((void *)vpage + 0x1000 - kuser_sz, __kuser_helper_start,
-		kuser_sz);
+	memcpy((void *)(vdso_pages[C_VECTORS] + 0x1000 - kuser_sz),
+	       __kuser_helper_start,
+	       kuser_sz);
 
 	/* sigreturn code */
-	memcpy((void *)vpage + AARCH32_KERN_SIGRET_CODE_OFFSET,
-               __aarch32_sigret_code_start, sigret_sz);
+	memcpy((void *)vdso_pages[C_SIGPAGE],
+	       __aarch32_sigret_code_start,
+	       sigret_sz);
 
-	flush_icache_range(vpage, vpage + PAGE_SIZE);
-	vectors_page[0] = virt_to_page(vpage);
+	flush_icache_range(vdso_pages[C_VECTORS],
+			   vdso_pages[C_VECTORS] + PAGE_SIZE);
+	flush_icache_range(vdso_pages[C_SIGPAGE],
+			   vdso_pages[C_SIGPAGE] + PAGE_SIZE);
+
+	aarch32_vdso_pages[C_VECTORS] = virt_to_page(vdso_pages[C_VECTORS]);
+	aarch32_vdso_pages[C_SIGPAGE] = virt_to_page(vdso_pages[C_SIGPAGE]);
 
 	return 0;
 }
-arch_initcall(alloc_vectors_page);
+arch_initcall(aarch32_alloc_vdso_pages);
 
-int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp)
+static int aarch32_kuser_helpers_setup(struct mm_struct *mm)
 {
-	struct mm_struct *mm = current->mm;
-	unsigned long addr = AARCH32_VECTORS_BASE;
-	static const struct vm_special_mapping spec = {
-		.name	= "[vectors]",
-		.pages	= vectors_page,
+	void *ret;
+
+	/* The kuser helpers must be mapped at the ABI-defined high address */
+	ret = _install_special_mapping(mm, AARCH32_KUSER_BASE, PAGE_SIZE,
+				       VM_READ | VM_EXEC |
+				       VM_MAYREAD | VM_MAYEXEC,
+				       &aarch32_vdso_spec[C_VECTORS]);
+
+	return PTR_ERR_OR_ZERO(ret);
+}
 
-	};
+static int aarch32_sigreturn_setup(struct mm_struct *mm)
+{
+	unsigned long addr;
 	void *ret;
 
-	if (down_write_killable(&mm->mmap_sem))
-		return -EINTR;
-	current->mm->context.vdso = (void *)addr;
+	addr = get_unmapped_area(NULL, 0, PAGE_SIZE, 0, 0);
+	if (IS_ERR_VALUE(addr)) {
+		ret = ERR_PTR(addr);
+		goto out;
+	}
 
-	/* Map vectors page at the high address. */
+	/*
+	 * VM_MAYWRITE is required to allow gdb to Copy-on-Write and
+	 * set breakpoints.
+	 */
 	ret = _install_special_mapping(mm, addr, PAGE_SIZE,
-				       VM_READ|VM_EXEC|VM_MAYREAD|VM_MAYEXEC,
-				       &spec);
+				       VM_READ | VM_EXEC | VM_MAYREAD |
+				       VM_MAYWRITE | VM_MAYEXEC,
+				       &aarch32_vdso_spec[C_SIGPAGE]);
+	if (IS_ERR(ret))
+		goto out;
 
-	up_write(&mm->mmap_sem);
+	mm->context.vdso = (void *)addr;
 
+out:
 	return PTR_ERR_OR_ZERO(ret);
 }
+
+int aarch32_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
+{
+	struct mm_struct *mm = current->mm;
+	int ret;
+
+	if (down_write_killable(&mm->mmap_sem))
+		return -EINTR;
+
+	ret = aarch32_kuser_helpers_setup(mm);
+	if (ret)
+		goto out;
+
+	ret = aarch32_sigreturn_setup(mm);
+
+out:
+	up_write(&mm->mmap_sem);
+	return ret;
+}
 #endif /* CONFIG_COMPAT */
 
 static int vdso_mremap(const struct vm_special_mapping *sm,