Message ID | 20190404124504.11137-2-peron.clem@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/2] dt-bindings: vendor-prefixes: add AZW | expand |
Hi, On Thu, Apr 04, 2019 at 02:45:04PM +0200, Clément Péron wrote: > Beelink GS1 is an Allwinner H6 based TV box, > which support: > - Allwinner H6 Quad-core 64-bit ARM Cortex-A53 > - GPU Mali-T720 > - 2GB LPDDR3 RAM > - AXP805 PMIC > - 1Gbps GMAC via RTL8211E > - FN-Link 6222B-SRB Wifi/BT > - 1x USB 2.0 Host and 1x USB 3.0 Host > - HDMI port > - S/PDIF Tx > - IR receiver > - 5V/2A DC power supply > > Signed-off-by: Clément Péron <peron.clem@gmail.com> > --- > > Thanks to Jagan and Icenowy, most of this devicetree is taken from their works on > the OrangePi One Plus and Pine H64. > > arch/arm64/boot/dts/allwinner/Makefile | 1 + > .../dts/allwinner/sun50i-h6-beelink-gs1.dts | 252 ++++++++++++++++++ > 2 files changed, 253 insertions(+) > create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts > > diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile > index e4dce2f6fa3a..2dd806a3d5c9 100644 > --- a/arch/arm64/boot/dts/allwinner/Makefile > +++ b/arch/arm64/boot/dts/allwinner/Makefile > @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb > +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-beelink-gs1.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts > new file mode 100644 > index 000000000000..d927e7d33bf3 > --- /dev/null > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts > @@ -0,0 +1,252 @@ > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > +/* > + * Copyright (C) 2019 Clément Péron <peron.clem@gmail.com> > + */ > + > +/dts-v1/; > + > +#include "sun50i-h6.dtsi" > + > +#include <dt-bindings/gpio/gpio.h> > + > +/ { > + model = "Beelink GS1"; > + compatible = "azw,beelink-gs1", "allwinner,sun50i-h6"; Please add that board to Documentation/devicetree/bindings/arm/sunxi.yaml, it's new and in linux-next. > +&mmc0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&mmc0_pins>; > + vmmc-supply = <®_cldo1>; > + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; > + bus-width = <4>; > + status = "okay"; > +}; > + > +&mmc2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&mmc2_pins>; If those (mmc0 and mmc2_pins) are the only muxing options as their names suggests, it should be set in the DTSI. If not, the name of the pin group should be changed. > + reg_cldo2: cldo2 { > + regulator-always-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc-wifi-1"; > + }; > + > + reg_cldo3: cldo3 { > + regulator-always-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc-wifi-2"; > + }; I don't see any SDIO bus declared, why do you need those regulators on? Can you also declare the PIO regulators? Thanks! Maxmie -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Hi, On Fri, 5 Apr 2019 at 11:08, Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > Hi, > > On Thu, Apr 04, 2019 at 02:45:04PM +0200, Clément Péron wrote: > > Beelink GS1 is an Allwinner H6 based TV box, > > which support: > > - Allwinner H6 Quad-core 64-bit ARM Cortex-A53 > > - GPU Mali-T720 > > - 2GB LPDDR3 RAM > > - AXP805 PMIC > > - 1Gbps GMAC via RTL8211E > > - FN-Link 6222B-SRB Wifi/BT > > - 1x USB 2.0 Host and 1x USB 3.0 Host > > - HDMI port > > - S/PDIF Tx > > - IR receiver > > - 5V/2A DC power supply > > > > Signed-off-by: Clément Péron <peron.clem@gmail.com> > > --- > > > > Thanks to Jagan and Icenowy, most of this devicetree is taken from their works on > > the OrangePi One Plus and Pine H64. > > > > arch/arm64/boot/dts/allwinner/Makefile | 1 + > > .../dts/allwinner/sun50i-h6-beelink-gs1.dts | 252 ++++++++++++++++++ > > 2 files changed, 253 insertions(+) > > create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts > > > > diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile > > index e4dce2f6fa3a..2dd806a3d5c9 100644 > > --- a/arch/arm64/boot/dts/allwinner/Makefile > > +++ b/arch/arm64/boot/dts/allwinner/Makefile > > @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb > > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb > > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb > > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb > > +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-beelink-gs1.dtb > > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb > > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb > > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts > > new file mode 100644 > > index 000000000000..d927e7d33bf3 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts > > @@ -0,0 +1,252 @@ > > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > > +/* > > + * Copyright (C) 2019 Clément Péron <peron.clem@gmail.com> > > + */ > > + > > +/dts-v1/; > > + > > +#include "sun50i-h6.dtsi" > > + > > +#include <dt-bindings/gpio/gpio.h> > > + > > +/ { > > + model = "Beelink GS1"; > > + compatible = "azw,beelink-gs1", "allwinner,sun50i-h6"; > > Please add that board to > Documentation/devicetree/bindings/arm/sunxi.yaml, it's new and in > linux-next. OK didn't know about that will do it. > > > +&mmc0 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&mmc0_pins>; > > + vmmc-supply = <®_cldo1>; > > + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; > > + bus-width = <4>; > > + status = "okay"; > > +}; > > + > > +&mmc2 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&mmc2_pins>; > > If those (mmc0 and mmc2_pins) are the only muxing options as their > names suggests, it should be set in the DTSI. Yes, it's the only muxing. I will add a patch to move these in the SOC dtsi. > > If not, the name of the pin group should be changed. > > > + reg_cldo2: cldo2 { > > + regulator-always-on; > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3300000>; > > + regulator-name = "vcc-wifi-1"; > > + }; > > + > > + reg_cldo3: cldo3 { > > + regulator-always-on; > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3300000>; > > + regulator-name = "vcc-wifi-2"; > > + }; > > I don't see any SDIO bus declared, why do you need those regulators on? You're right forget to remove. Will do. > > Can you also declare the PIO regulators? Ok, Thanks for the review. > > Thanks! > Maxmie > > -- > Maxime Ripard, Bootlin > Embedded Linux and Kernel engineering > https://bootlin.com
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index e4dce2f6fa3a..2dd806a3d5c9 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-beelink-gs1.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts new file mode 100644 index 000000000000..d927e7d33bf3 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts @@ -0,0 +1,252 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +/* + * Copyright (C) 2019 Clément Péron <peron.clem@gmail.com> + */ + +/dts-v1/; + +#include "sun50i-h6.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Beelink GS1"; + compatible = "azw,beelink-gs1", "allwinner,sun50i-h6"; + + aliases { + ethernet0 = &emac; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + power { + label = "beelink:white:power"; + gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ + default-state = "on"; + }; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply directly from the DC jack */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; +}; + +&de { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_aldo2>; + allwinner,rx-delay-ps = <0>; + allwinner,tx-delay-ps = <0>; + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <®_cldo1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; + bus-width = <4>; + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + vmmc-supply = <®_cldo1>; + vqmmc-supply = <®_bldo2>; + non-removable; + cap-mmc-hw-reset; + bus-width = <8>; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&r_i2c { + status = "okay"; + + axp805: pmic@36 { + compatible = "x-powers,axp805", "x-powers,axp806"; + reg = <0x36>; + interrupt-parent = <&r_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <1>; + x-powers,self-working-mode; + vina-supply = <®_vcc5v>; + vinb-supply = <®_vcc5v>; + vinc-supply = <®_vcc5v>; + vind-supply = <®_vcc5v>; + vine-supply = <®_vcc5v>; + aldoin-supply = <®_vcc5v>; + bldoin-supply = <®_vcc5v>; + cldoin-supply = <®_vcc5v>; + + regulators { + reg_aldo1: aldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pl"; + }; + + reg_aldo2: aldo2 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-ac200"; + regulator-enable-ramp-delay = <100000>; + }; + + reg_aldo3: aldo3 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc25-dram"; + }; + + reg_bldo1: bldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-bias-pll"; + }; + + reg_bldo2: bldo2 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-efuse-pcie-hdmi-io"; + }; + + reg_bldo3: bldo3 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-dcxoio"; + }; + + bldo4 { + /* unused */ + }; + + reg_cldo1: cldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; + }; + + reg_cldo2: cldo2 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi-1"; + }; + + reg_cldo3: cldo3 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi-2"; + }; + + reg_dcdca: dcdca { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1080000>; + regulator-name = "vdd-cpu"; + }; + + reg_dcdcc: dcdcc { + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1080000>; + regulator-name = "vdd-gpu"; + }; + + reg_dcdcd: dcdcd { + regulator-always-on; + regulator-min-microvolt = <960000>; + regulator-max-microvolt = <960000>; + regulator-name = "vdd-sys"; + }; + + reg_dcdce: dcdce { + regulator-always-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vcc-dram"; + }; + + sw { + /* unused */ + }; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; + status = "okay"; +}; + +&usb2otg { + dr_mode = "host"; + status = "okay"; +}; + +&usb2phy { + usb0_vbus-supply = <®_vcc5v>; + status = "okay"; +};
Beelink GS1 is an Allwinner H6 based TV box, which support: - Allwinner H6 Quad-core 64-bit ARM Cortex-A53 - GPU Mali-T720 - 2GB LPDDR3 RAM - AXP805 PMIC - 1Gbps GMAC via RTL8211E - FN-Link 6222B-SRB Wifi/BT - 1x USB 2.0 Host and 1x USB 3.0 Host - HDMI port - S/PDIF Tx - IR receiver - 5V/2A DC power supply Signed-off-by: Clément Péron <peron.clem@gmail.com> --- Thanks to Jagan and Icenowy, most of this devicetree is taken from their works on the OrangePi One Plus and Pine H64. arch/arm64/boot/dts/allwinner/Makefile | 1 + .../dts/allwinner/sun50i-h6-beelink-gs1.dts | 252 ++++++++++++++++++ 2 files changed, 253 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts