[v2,2/2] x86/AMD: limit C1E disable family range
diff mbox series

Message ID 5CA765B80200007800224E6D@prv1-mh.provo.novell.com
State New, archived
Headers show
Series
  • x86/AMD: correct certain Fam17 checks
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Commit Message

Jan Beulich April 5, 2019, 2:27 p.m. UTC
Just like for other family values of 0x17 (see "x86/AMD: correct certain
Fam17 checks"), commit 3157bb4e13 ("Add MSR support for various feature
AMD processor families") made the original check for Fam11 here include
families all the way up to Fam17. The involved MSR (0xC0010055),
however, is fully reserved starting from Fam16, and the two bits of
interest are reserved for Fam12 and onwards (albeit I admit I wasn't
able to find any Fam13 doc). Restore the upper bound to be Fam11.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v2: New.

Comments

Jan Beulich May 27, 2019, 9:33 a.m. UTC | #1
>>> On 05.04.19 at 16:27,  wrote:
> Just like for other family values of 0x17 (see "x86/AMD: correct certain
> Fam17 checks"), commit 3157bb4e13 ("Add MSR support for various feature
> AMD processor families") made the original check for Fam11 here include
> families all the way up to Fam17. The involved MSR (0xC0010055),
> however, is fully reserved starting from Fam16, and the two bits of
> interest are reserved for Fam12 and onwards (albeit I admit I wasn't
> able to find any Fam13 doc). Restore the upper bound to be Fam11.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> v2: New.
> 
> --- a/xen/arch/x86/cpu/amd.c
> +++ b/xen/arch/x86/cpu/amd.c
> @@ -628,7 +628,7 @@ static void init_amd(struct cpuinfo_x86
>  
>  	switch(c->x86)
>  	{
> -	case 0xf ... 0x17:
> +	case 0xf ... 0x11:
>  		disable_c1e(NULL);
>  		if (acpi_smi_cmd && (acpi_enable_value | acpi_disable_value))
>  			amd_acpi_c1e_quirk = true;
> 
>
Andrew Cooper June 17, 2019, 4 p.m. UTC | #2
On 05/04/2019 15:27, Jan Beulich wrote:
> Just like for other family values of 0x17 (see "x86/AMD: correct certain
> Fam17 checks"), commit 3157bb4e13 ("Add MSR support for various feature
> AMD processor families") made the original check for Fam11 here include
> families all the way up to Fam17. The involved MSR (0xC0010055),
> however, is fully reserved starting from Fam16, and the two bits of
> interest are reserved for Fam12 and onwards (albeit I admit I wasn't
> able to find any Fam13 doc). Restore the upper bound to be Fam11.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>

Patch
diff mbox series

--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -628,7 +628,7 @@  static void init_amd(struct cpuinfo_x86
 
 	switch(c->x86)
 	{
-	case 0xf ... 0x17:
+	case 0xf ... 0x11:
 		disable_c1e(NULL);
 		if (acpi_smi_cmd && (acpi_enable_value | acpi_disable_value))
 			amd_acpi_c1e_quirk = true;