diff mbox series

[01/11] ARM: dts: r8a77470: Add HSCIF support

Message ID 1554799912-24764-2-git-send-email-cv-dong@jinso.co.jp (mailing list archive)
State Changes Requested
Delegated to: Simon Horman
Headers show
Series Add more support to the RZ/G1C (r8a77470) SoC | expand

Commit Message

Cao Van Dong April 9, 2019, 8:51 a.m. UTC 
Add hscif{0|1|2} nodes to dtsi for HSCIF support on the RZ/G1C (r8a77470) SoC.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
---
 arch/arm/boot/dts/r8a77470.dtsi | 48 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

Comments

Simon Horman April 9, 2019, 11:51 a.m. UTC | #1 
On Tue, Apr 09, 2019 at 05:51:42PM +0900, Cao Van Dong wrote:
> Add hscif{0|1|2} nodes to dtsi for HSCIF support on the RZ/G1C (r8a77470) SoC.
> 
> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman April 9, 2019, 12:15 p.m. UTC | #2 
On Tue, Apr 09, 2019 at 01:51:38PM +0200, Simon Horman wrote:
> On Tue, Apr 09, 2019 at 05:51:42PM +0900, Cao Van Dong wrote:
> > Add hscif{0|1|2} nodes to dtsi for HSCIF support on the RZ/G1C (r8a77470) SoC.
> > 
> > Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
> 
> Thanks,
> 
> This looks fine to me but I will wait to see if there are other reviews
> before applying.
> 
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Sorry, I spoke a little too soon.

The following incremental change is required in order
for this patch to compile.

Please test that each patch in this series compiles and resubmit.


diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 85f7a6f68720..60bd79fc35f7 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -594,12 +594,12 @@
 			reg = <0 0xe62c0000 0 0x60>;
 			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 717>,
-				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
+				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
 			clock-names = "fck", "brg_int", "scif_clk";
 			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 			       <&dmac1 0x39>, <&dmac1 0x3a>;
 			dma-names = "tx", "rx", "tx", "rx";
-			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
 			resets = <&cpg 717>;
 			status = "disabled";
 		};
@@ -610,12 +610,12 @@
 			reg = <0 0xe62c8000 0 0x60>;
 			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 716>,
-				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
+				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
 			clock-names = "fck", "brg_int", "scif_clk";
 			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 			       <&dmac1 0x4d>, <&dmac1 0x4e>;
 			dma-names = "tx", "rx", "tx", "rx";
-			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
 			resets = <&cpg 716>;
 			status = "disabled";
 		};
@@ -626,12 +626,12 @@
 			reg = <0 0xe62d0000 0 0x60>;
 			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 713>,
-				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
+				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
 			clock-names = "fck", "brg_int", "scif_clk";
 			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 			       <&dmac1 0x3b>, <&dmac1 0x3c>;
 			dma-names = "tx", "rx", "tx", "rx";
-			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
 			resets = <&cpg 713>;
 			status = "disabled";
 		};
Cao Van Dong April 10, 2019, 12:16 a.m. UTC | #3 
Dear Simon-san,

On 2019/04/09 21:15, Simon Horman wrote:
> On Tue, Apr 09, 2019 at 01:51:38PM +0200, Simon Horman wrote:
>> On Tue, Apr 09, 2019 at 05:51:42PM +0900, Cao Van Dong wrote:
>>> Add hscif{0|1|2} nodes to dtsi for HSCIF support on the RZ/G1C (r8a77470) SoC.
>>>
>>> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
>> Thanks,
>>
>> This looks fine to me but I will wait to see if there are other reviews
>> before applying.
>>
>> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
> Sorry, I spoke a little too soon.
>
> The following incremental change is required in order
> for this patch to compile.
>
> Please test that each patch in this series compiles and resubmit.

Thanks for your feedback. Very sorry for the trouble!
I will correct and resubmit in version 2.

> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 85f7a6f68720..60bd79fc35f7 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -594,12 +594,12 @@
>   			reg = <0 0xe62c0000 0 0x60>;
>   			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
>   			clocks = <&cpg CPG_MOD 717>,
> -				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
> +				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
>   			clock-names = "fck", "brg_int", "scif_clk";
>   			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
>   			       <&dmac1 0x39>, <&dmac1 0x3a>;
>   			dma-names = "tx", "rx", "tx", "rx";
> -			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
>   			resets = <&cpg 717>;
>   			status = "disabled";
>   		};
> @@ -610,12 +610,12 @@
>   			reg = <0 0xe62c8000 0 0x60>;
>   			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
>   			clocks = <&cpg CPG_MOD 716>,
> -				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
> +				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
>   			clock-names = "fck", "brg_int", "scif_clk";
>   			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
>   			       <&dmac1 0x4d>, <&dmac1 0x4e>;
>   			dma-names = "tx", "rx", "tx", "rx";
> -			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
>   			resets = <&cpg 716>;
>   			status = "disabled";
>   		};
> @@ -626,12 +626,12 @@
>   			reg = <0 0xe62d0000 0 0x60>;
>   			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
>   			clocks = <&cpg CPG_MOD 713>,
> -				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
> +				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
>   			clock-names = "fck", "brg_int", "scif_clk";
>   			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
>   			       <&dmac1 0x3b>, <&dmac1 0x3c>;
>   			dma-names = "tx", "rx", "tx", "rx";
> -			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
>   			resets = <&cpg 713>;
>   			status = "disabled";
>   		};
Thank you,
Dong
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 493cf2b..85f7a6f 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -588,6 +588,54 @@ 
 			status = "disabled";
 		};
 
+		hscif0: serial@e62c0000 {
+			compatible = "renesas,hscif-r8a77470",
+				     "renesas,rcar-gen2-hscif", "renesas,hscif";
+			reg = <0 0xe62c0000 0 0x60>;
+			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 717>,
+				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+			       <&dmac1 0x39>, <&dmac1 0x3a>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 717>;
+			status = "disabled";
+		};
+
+		hscif1: serial@e62c8000 {
+			compatible = "renesas,hscif-r8a77470",
+				     "renesas,rcar-gen2-hscif", "renesas,hscif";
+			reg = <0 0xe62c8000 0 0x60>;
+			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 716>,
+				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+			       <&dmac1 0x4d>, <&dmac1 0x4e>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 716>;
+			status = "disabled";
+		};
+
+		hscif2: serial@e62d0000 {
+			compatible = "renesas,hscif-r8a77470",
+				     "renesas,rcar-gen2-hscif", "renesas,hscif";
+			reg = <0 0xe62d0000 0 0x60>;
+			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 713>,
+				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+			       <&dmac1 0x3b>, <&dmac1 0x3c>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 713>;
+			status = "disabled";
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";