diff mbox series

[4/7] drm/i915/icl: Enable media sampler powergate

Message ID 20190409161310.20382-4-mika.kuoppala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11 | expand

Commit Message

Mika Kuoppala April 9, 2019, 4:13 p.m. UTC
Enable media sampler powergate as recommended.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 5 +++--
 drivers/gpu/drm/i915/intel_pm.c | 4 +++-
 2 files changed, 6 insertions(+), 3 deletions(-)

Comments

Chris Wilson April 9, 2019, 4:34 p.m. UTC | #1
Quoting Mika Kuoppala (2019-04-09 17:13:07)
> Enable media sampler powergate as recommended.
> 
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 5 +++--
>  drivers/gpu/drm/i915/intel_pm.c | 4 +++-
>  2 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 9c206e803ab3..20f5850c52f8 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8687,8 +8687,9 @@ enum {
>  #define GEN9_MEDIA_PG_IDLE_HYSTERESIS          _MMIO(0xA0C4)
>  #define GEN9_RENDER_PG_IDLE_HYSTERESIS         _MMIO(0xA0C8)
>  #define GEN9_PG_ENABLE                         _MMIO(0xA210)
> -#define GEN9_RENDER_PG_ENABLE                  (1 << 0)
> -#define GEN9_MEDIA_PG_ENABLE                   (1 << 1)
> +#define GEN9_RENDER_PG_ENABLE                  BIT(0)
> +#define GEN9_MEDIA_PG_ENABLE                   BIT(1)
> +#define GEN11_MEDIA_SAMPLER_PG_ENABLE          BIT(2)

REG_BIT(foo)
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9c206e803ab3..20f5850c52f8 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8687,8 +8687,9 @@  enum {
 #define GEN9_MEDIA_PG_IDLE_HYSTERESIS		_MMIO(0xA0C4)
 #define GEN9_RENDER_PG_IDLE_HYSTERESIS		_MMIO(0xA0C8)
 #define GEN9_PG_ENABLE				_MMIO(0xA210)
-#define GEN9_RENDER_PG_ENABLE			(1 << 0)
-#define GEN9_MEDIA_PG_ENABLE			(1 << 1)
+#define GEN9_RENDER_PG_ENABLE			BIT(0)
+#define GEN9_MEDIA_PG_ENABLE			BIT(1)
+#define GEN11_MEDIA_SAMPLER_PG_ENABLE		BIT(2)
 #define GEN8_PUSHBUS_CONTROL			_MMIO(0xA248)
 #define GEN8_PUSHBUS_ENABLE			_MMIO(0xA250)
 #define GEN8_PUSHBUS_SHIFT			_MMIO(0xA25C)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b9be9ea5fc18..47f98e064de5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7185,7 +7185,9 @@  static void gen11_enable_rc6(struct drm_i915_private *dev_priv)
 	 * 3b: Enable Coarse Power Gating only when RC6 is enabled.
 	 */
 	I915_WRITE(GEN9_PG_ENABLE,
-		   GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
+		   GEN9_RENDER_PG_ENABLE |
+		   GEN9_MEDIA_PG_ENABLE |
+		   GEN11_MEDIA_SAMPLER_PG_ENABLE);
 
 	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
 }