| Message ID | 20190409204707.150347-4-dianders@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | rockchip: A few clock cleanups for rk3288 | expand |
Am Dienstag, 9. April 2019, 22:47:07 CEST schrieb Douglas Anderson: > From: Caesar Wang <caesar.wang@rock-chips.com> > > We use the new PWM IP on RK3288, but the PWM's clock indeed incorrect. > > Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> > Signed-off-by: Douglas Anderson <dianders@chromium.org> applied into a branch for 5._3_ ... as it requires a change coming through a different tree, the patch gets a "quarantine"-release in between. Thanks Heiko
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 8bce2fc49b24..efdfa3737561 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -677,7 +677,7 @@ #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; - clocks = <&cru PCLK_PWM>; + clocks = <&cru PCLK_RKPWM>; clock-names = "pwm"; status = "disabled"; }; @@ -688,7 +688,7 @@ #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&pwm1_pin>; - clocks = <&cru PCLK_PWM>; + clocks = <&cru PCLK_RKPWM>; clock-names = "pwm"; status = "disabled"; }; @@ -699,7 +699,7 @@ #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&pwm2_pin>; - clocks = <&cru PCLK_PWM>; + clocks = <&cru PCLK_RKPWM>; clock-names = "pwm"; status = "disabled"; }; @@ -710,7 +710,7 @@ #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pwm3_pin>; - clocks = <&cru PCLK_PWM>; + clocks = <&cru PCLK_RKPWM>; clock-names = "pwm"; status = "disabled"; };