[03/12] riscv: remove unreachable big endian code

Message ID	20190412143948.12478-4-hch@lst.de (mailing list archive)
State	New, archived
Headers	show Return-Path: <linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org> From: Christoph Hellwig <hch@lst.de> To: Palmer Dabbelt <palmer@sifive.com> Subject: [PATCH 03/12] riscv: remove unreachable big endian code Date: Fri, 12 Apr 2019 16:39:39 +0200 Message-Id: <20190412143948.12478-4-hch@lst.de> In-Reply-To: <20190412143948.12478-1-hch@lst.de> References: <20190412143948.12478-1-hch@lst.de> MIME-Version: 1.0 Precedence: list Cc: Nick Kossifidis <mick@ics.forth.gr>, Atish Patra <atish.patra@wdc.com>, linux-riscv@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org
Series	[01/12] riscv: use asm-generic/extable.h \| expand [01/12] riscv: use asm-generic/extable.h [02/12] riscv: turn mm_segment_t into a struct [03/12] riscv: remove unreachable big endian code [04/12] riscv: remove CONFIG_RISCV_ISA_A [05/12] riscv: clear all pending interrupts when booting [06/12] riscv: simplify the stack pointer setup in head.S [07/12] riscv: cleanup the parse_dtb calling conventions [08/12] riscv: remove unreachable !CONFIG_FRAME_POINTER code [09/12] riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR code [10/12] riscv: remove duplicate macros from ptrace.h [11/12] riscv: print the unexpected interrupt cause [12/12] riscv: call pm_power_off from machine_halt / machine_power_off

Message ID

20190412143948.12478-4-hch@lst.de (mailing list archive)

State

New, archived

Headers

From: Christoph Hellwig <hch@lst.de>
To: Palmer Dabbelt <palmer@sifive.com>
Subject: [PATCH 03/12] riscv: remove unreachable big endian code
Date: Fri, 12 Apr 2019 16:39:39 +0200
Message-Id: <20190412143948.12478-4-hch@lst.de>
In-Reply-To: <20190412143948.12478-1-hch@lst.de>
References: <20190412143948.12478-1-hch@lst.de>
MIME-Version: 1.0
Precedence: list
Cc: Nick Kossifidis <mick@ics.forth.gr>, Atish Patra <atish.patra@wdc.com>,
 linux-riscv@lists.infradead.org
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 linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org

Series

[01/12] riscv: use asm-generic/extable.h | expand

Commit Message

Christoph Hellwig April 12, 2019, 2:39 p.m. UTC

RISC-V is always little endian.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/riscv/include/asm/elf.h     | 6 ------
 arch/riscv/include/asm/uaccess.h | 9 +--------
 2 files changed, 1 insertion(+), 14 deletions(-)

diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index 697fc23b0d5a..ce0cd7d77eb0 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -27,13 +27,7 @@ 
 #define ELF_CLASS	ELFCLASS32
 #endif
 
-#if defined(__LITTLE_ENDIAN)
 #define ELF_DATA	ELFDATA2LSB
-#elif defined(__BIG_ENDIAN)
-#define ELF_DATA	ELFDATA2MSB
-#else
-#error "Unknown endianness"
-#endif
 
 /*
  * This is used to ensure we don't load something for the wrong architecture.
diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
index c51fc8bfbdde..b26f407be5c8 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -101,15 +101,8 @@  static inline int __access_ok(unsigned long addr, unsigned long size)
  * on our cache or tlb entries.
  */
 
-#if defined(__LITTLE_ENDIAN)
-#define __MSW	1
 #define __LSW	0
-#elif defined(__BIG_ENDIAN)
-#define __MSW	0
-#define	__LSW	1
-#else
-#error "Unknown endianness"
-#endif
+#define __MSW	1
 
 /*
  * The "__xxx" versions of the user access functions do not verify the address

[03/12] riscv: remove unreachable big endian code

Commit Message

Patch