From patchwork Mon Apr 15 21:30:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 10901617 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 945F817E6 for ; Mon, 15 Apr 2019 21:31:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7DC15286FE for ; Mon, 15 Apr 2019 21:31:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 71D1A28801; Mon, 15 Apr 2019 21:31:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0092D286FE for ; Mon, 15 Apr 2019 21:31:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728259AbfDOVaz (ORCPT ); Mon, 15 Apr 2019 17:30:55 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:9361 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727720AbfDOVaz (ORCPT ); Mon, 15 Apr 2019 17:30:55 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 15 Apr 2019 14:30:51 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 15 Apr 2019 14:30:54 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 15 Apr 2019 14:30:54 -0700 Received: from HQMAIL108.nvidia.com (172.18.146.13) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 15 Apr 2019 21:30:54 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Mon, 15 Apr 2019 21:30:54 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.167.253]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Mon, 15 Apr 2019 14:30:53 -0700 From: Sowjanya Komatineni To: , , , , , , , CC: , , , , Subject: [PATCH V3 5/9] spi: export spi core function spi_set_cs Date: Mon, 15 Apr 2019 14:30:30 -0700 Message-ID: <1555363834-32155-6-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1555363834-32155-1-git-send-email-skomatineni@nvidia.com> References: <1555363834-32155-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1555363851; bh=WRtJfiWmOEYhx64jh6qAJX+kcmk+2aZRa6tkyoRkzLY=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=p3Co2cboMlrBo1i7WnyEaIwkL/oQZNy4yVfXzfvtq7pt+4yQ02GLbe39W41Ewg/tu x0UDmJNyV1A5WpIXvlabeHfHOr1xkY8AW376AxWJ6FkRBcd7rbkIZdn3kCA/3Nbsf4 z5R/Bq80Y6VSisR/O60huYi3oEmsBTzFWVJg/XqqfD5gT6yJ4AAZzCmzlfY0dSIOEd M9bToEfc+LEpb89ZqbsZrECHhWHfLXuldR4aVArOtkPjV4KyBaj+UyWbOUj6whmHlF prDqpIRPlF1n86aVazfWfNWXuItiuIxl28jkFopzF2hVrGtBd2+7U33oZPJjiJopTp SHxP58AkEikpA== Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch exports spi_set_cs of the spi core to allow SPI masters to use when gpio based chip select is needed. Signed-off-by: Sowjanya Komatineni --- drivers/spi/spi.c | 3 ++- include/linux/spi/spi.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 59b1e57cae74..fa70e595f17a 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -773,7 +773,7 @@ int spi_register_board_info(struct spi_board_info const *info, unsigned n) /*-------------------------------------------------------------------------*/ -static void spi_set_cs(struct spi_device *spi, bool enable) +void spi_set_cs(struct spi_device *spi, bool enable) { if (spi->mode & SPI_CS_HIGH) enable = !enable; @@ -801,6 +801,7 @@ static void spi_set_cs(struct spi_device *spi, bool enable) spi->controller->set_cs(spi, !enable); } } +EXPORT_SYMBOL_GPL(spi_set_cs); #ifdef CONFIG_HAS_DMA int spi_map_buf(struct spi_controller *ctlr, struct device *dev, diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index fc4d21b4c2e4..c7ca95f26725 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -973,6 +973,7 @@ extern int spi_async(struct spi_device *spi, struct spi_message *message); extern int spi_async_locked(struct spi_device *spi, struct spi_message *message); extern int spi_slave_abort(struct spi_device *spi); +extern void spi_set_cs(struct spi_device *spi, bool enable); static inline size_t spi_max_message_size(struct spi_device *spi)