From patchwork Wed Apr 17 01:40:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Wei Yang X-Patchwork-Id: 10904349 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 16F9B922 for ; Wed, 17 Apr 2019 01:42:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 019B928A2E for ; Wed, 17 Apr 2019 01:42:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E7EC528A3A; Wed, 17 Apr 2019 01:42:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6760828A3A for ; Wed, 17 Apr 2019 01:42:56 +0000 (UTC) Received: from localhost ([127.0.0.1]:45257 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hGZbD-0007dh-Kg for patchwork-qemu-devel@patchwork.kernel.org; Tue, 16 Apr 2019 21:42:55 -0400 Received: from eggs.gnu.org ([209.51.188.92]:47835) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hGZZp-0006VY-9g for qemu-devel@nongnu.org; Tue, 16 Apr 2019 21:41:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hGZZn-0006Lv-TJ for qemu-devel@nongnu.org; Tue, 16 Apr 2019 21:41:29 -0400 Received: from mga01.intel.com ([192.55.52.88]:47707) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hGZZk-0006KG-NY; Tue, 16 Apr 2019 21:41:24 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Apr 2019 18:41:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,360,1549958400"; d="scan'208";a="338161183" Received: from richard.sh.intel.com (HELO localhost) ([10.239.159.54]) by fmsmga006.fm.intel.com with ESMTP; 16 Apr 2019 18:41:21 -0700 From: Wei Yang To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Wed, 17 Apr 2019 09:40:36 +0800 Message-Id: <20190417014038.26018-5-richardw.yang@linux.intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190417014038.26018-1-richardw.yang@linux.intel.com> References: <20190417014038.26018-1-richardw.yang@linux.intel.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.88 Subject: [Qemu-devel] [PATCH v3 4/6] hw/arm/virt-acpi-build: pass AcpiMcfgInfo to build_mcfg() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, peter.maydell@linaro.org, mst@redhat.com, shannon.zhaosl@gmail.com, Wei Yang , imammedo@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP To build MCFG, two information is necessary: * bus number * base address Abstract these two information to AcpiMcfgInfo so that build_mcfg and build_mcfg_q35 will have the same declaration. Signed-off-by: Wei Yang Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Igor Mammedov --- v3: * move AcpiMcfgInfo to pci.h v2: * for arm platform, construct a AcpiMcfgInfo directly --- hw/arm/virt-acpi-build.c | 18 +++++++++++------- hw/i386/acpi-build.c | 6 +----- include/hw/acpi/pci.h | 33 +++++++++++++++++++++++++++++++++ 3 files changed, 45 insertions(+), 12 deletions(-) create mode 100644 include/hw/acpi/pci.h diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index e09e7eff8d..ebddcde596 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -40,6 +40,7 @@ #include "hw/hw.h" #include "hw/acpi/aml-build.h" #include "hw/acpi/utils.h" +#include "hw/acpi/pci.h" #include "hw/pci/pcie_host.h" #include "hw/pci/pci.h" #include "hw/arm/virt.h" @@ -546,21 +547,18 @@ build_srat(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) } static void -build_mcfg(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) +build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info) { AcpiTableMcfg *mcfg; - const MemMapEntry *memmap = vms->memmap; - int ecam_id = VIRT_ECAM_ID(vms->highmem_ecam); int len = sizeof(*mcfg) + sizeof(mcfg->allocation[0]); mcfg = acpi_data_push(table_data, len); - mcfg->allocation[0].address = cpu_to_le64(memmap[ecam_id].base); + mcfg->allocation[0].address = cpu_to_le64(info->base); /* Only a single allocation so no need to play with segments */ mcfg->allocation[0].pci_segment = cpu_to_le16(0); mcfg->allocation[0].start_bus_number = 0; - mcfg->allocation[0].end_bus_number = - PCIE_MMCFG_BUS(memmap[ecam_id].size - 1); + mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->size - 1); build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, NULL); } @@ -801,7 +799,13 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables) build_gtdt(tables_blob, tables->linker, vms); acpi_add_table(table_offsets, tables_blob); - build_mcfg(tables_blob, tables->linker, vms); + { + AcpiMcfgInfo mcfg = { + .base = vms->memmap[VIRT_ECAM_ID(vms->highmem_ecam)].base, + .size = vms->memmap[VIRT_ECAM_ID(vms->highmem_ecam)].size, + }; + build_mcfg(tables_blob, tables->linker, &mcfg); + } acpi_add_table(table_offsets, tables_blob); build_spcr(tables_blob, tables->linker, vms); diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index f0d27bffd6..c2de7f4b01 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -58,6 +58,7 @@ #include "hw/acpi/aml-build.h" #include "hw/acpi/utils.h" +#include "hw/acpi/pci.h" #include "qom/qom-qobject.h" #include "hw/i386/amd_iommu.h" @@ -86,11 +87,6 @@ /* Default IOAPIC ID */ #define ACPI_BUILD_IOAPIC_ID 0x0 -typedef struct AcpiMcfgInfo { - uint64_t base; - uint32_t size; -} AcpiMcfgInfo; - typedef struct AcpiPmInfo { bool s3_disabled; bool s4_disabled; diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h new file mode 100644 index 0000000000..124af7d32a --- /dev/null +++ b/include/hw/acpi/pci.h @@ -0,0 +1,33 @@ +/* + * Support for generating PCI related ACPI tables and passing them to Guests + * + * Copyright (C) 2006 Fabrice Bellard + * Copyright (C) 2008-2010 Kevin O'Connor + * Copyright (C) 2013-2019 Red Hat Inc + * Copyright (C) 2019 Intel Corporation + * + * Author: Wei Yang + * Author: Michael S. Tsirkin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ +#ifndef HW_ACPI_PCI_H +#define HW_ACPI_PCI_H + +typedef struct AcpiMcfgInfo { + uint64_t base; + uint32_t size; +} AcpiMcfgInfo; + +#endif