| Message ID | 20190423095107.21091-2-gregory.clement@bootlin.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add CPU clock support for Armada 7K/8K | expand |
On Tue, Apr 23, 2019 at 11:51:02AM +0200, Gregory CLEMENT wrote: > Document the device tree binding for the cluster clock controllers found > in the Armada 7K/8K SoCs. > > Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> > --- > .../arm/marvell/ap806-system-controller.txt | 26 +++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt > index 7b8b8eb0191f..a65d3e9ff915 100644 > --- a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt > +++ b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt > @@ -143,3 +143,29 @@ ap_syscon1: system-controller@6f8000 { > #thermal-sensor-cells = <1>; > }; > }; > + > +Cluster clocks: > +--------------- > + > +Device Tree Clock bindings for cluster clock of AP806 Marvell. Each > +cluster contain up to 2 CPUs running at the same frequency. > + > +Required properties: > +- compatible: must be "marvell,ap806-cpu-clock"; > +- #clock-cells : should be set to 1. > +- clocks : shall be the input parents clock phandle for the clock. > +- reg: register range associated the cluster clocks, offset must be 0 > + and the size have to be the whole size of the system-controller > + > + > +ap_syscon1: system-controller@6f8000 { > + compatible = "syscon", "simple-mfd"; This should have a specific compatible. > + reg = <0x6f8000 0x1000>; > + > + cpu_clk: clock-cpu@0 { > + compatible = "marvell,ap806-cpu-clock"; > + clocks = <&ap_clk 0>, <&ap_clk 1>; > + #clock-cells = <1>; > + reg = <0x0 0x1000>; This takes the entire address range of the parent, then why the child node? You can't add any other child nodes without creating an overlap. Your example also won't compile. Rob
diff --git a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt index 7b8b8eb0191f..a65d3e9ff915 100644 --- a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt @@ -143,3 +143,29 @@ ap_syscon1: system-controller@6f8000 { #thermal-sensor-cells = <1>; }; }; + +Cluster clocks: +--------------- + +Device Tree Clock bindings for cluster clock of AP806 Marvell. Each +cluster contain up to 2 CPUs running at the same frequency. + +Required properties: +- compatible: must be "marvell,ap806-cpu-clock"; +- #clock-cells : should be set to 1. +- clocks : shall be the input parents clock phandle for the clock. +- reg: register range associated the cluster clocks, offset must be 0 + and the size have to be the whole size of the system-controller + + +ap_syscon1: system-controller@6f8000 { + compatible = "syscon", "simple-mfd"; + reg = <0x6f8000 0x1000>; + + cpu_clk: clock-cpu@0 { + compatible = "marvell,ap806-cpu-clock"; + clocks = <&ap_clk 0>, <&ap_clk 1>; + #clock-cells = <1>; + reg = <0x0 0x1000>; + }; +};
Document the device tree binding for the cluster clock controllers found in the Armada 7K/8K SoCs. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> --- .../arm/marvell/ap806-system-controller.txt | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+)