Message ID | 20190424212218.15230-1-nadav.amit@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [kvm-unit-tests] x86: Allow xapic ID writes to silently fail | expand |
On 24/04/19 23:22, nadav.amit@gmail.com wrote: > From: Nadav Amit <nadav.amit@gmail.com> > > According to Intel SDM: "Some processors permit software to modify the > APIC ID. However, the ability of software to modify the APIC ID is > processor model specific." > > Allow this behavior not to cause failures. > > Cc: Sean Christopherson <sean.j.christopherson@intel.com> > Signed-off-by: Nadav Amit <nadav.amit@gmail.com> > --- > x86/apic.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/x86/apic.c b/x86/apic.c > index d1ed5ea..6772f3f 100644 > --- a/x86/apic.c > +++ b/x86/apic.c > @@ -210,7 +210,7 @@ static void __test_apic_id(void * unused) > newid = (id + 1) << 24; > report("writeable xapic id", > !test_for_exception(GP_VECTOR, do_write_apic_id, &newid) && > - id + 1 == apic_id()); > + (id == apic_id() || id + 1 == apic_id())); > > if (!enable_x2apic()) > goto out; > Queued, thanks. Paolo
> On Apr 30, 2019, at 12:13 PM, Paolo Bonzini <pbonzini@redhat.com> wrote: > > On 24/04/19 23:22, nadav.amit@gmail.com wrote: >> From: Nadav Amit <nadav.amit@gmail.com> >> >> According to Intel SDM: "Some processors permit software to modify the >> APIC ID. However, the ability of software to modify the APIC ID is >> processor model specific." >> >> Allow this behavior not to cause failures. >> >> Cc: Sean Christopherson <sean.j.christopherson@intel.com> >> Signed-off-by: Nadav Amit <nadav.amit@gmail.com> >> --- >> x86/apic.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/x86/apic.c b/x86/apic.c >> index d1ed5ea..6772f3f 100644 >> --- a/x86/apic.c >> +++ b/x86/apic.c >> @@ -210,7 +210,7 @@ static void __test_apic_id(void * unused) >> newid = (id + 1) << 24; >> report("writeable xapic id", >> !test_for_exception(GP_VECTOR, do_write_apic_id, &newid) && >> - id + 1 == apic_id()); >> + (id == apic_id() || id + 1 == apic_id())); >> >> if (!enable_x2apic()) >> goto out; > > Queued, thanks. Thanks. Silly question - when you say “queued”, what do you mean exactly? In other words, when will it be reflected on the kvm-unit-tests repository? I want to send a few more fixes, but I lost track which ones I sent, so I want to rebase first.
On 30/04/19 21:34, Nadav Amit wrote: >> Queued, thanks. > Thanks. Silly question - when you say “queued”, what do you mean exactly? > > In other words, when will it be reflected on the kvm-unit-tests repository? > I want to send a few more fixes, but I lost track which ones I sent, so I > want to rebase first. Usually very soon (an hour or two), in this case I am travelling so it will appear in about a week. I have pushed what I have to a "next" branch. These are the commits from you: x86: Fix wrong test for 5-level page-table x86: Remove INIT deassert x86: Fix allowed IA32_VMX_VMCS_ENUM values x86: Wait for self IPI x86: Initialize vmcs_root x86: Allow xapic ID writes to silently fail Thanks, Paolo
diff --git a/x86/apic.c b/x86/apic.c index d1ed5ea..6772f3f 100644 --- a/x86/apic.c +++ b/x86/apic.c @@ -210,7 +210,7 @@ static void __test_apic_id(void * unused) newid = (id + 1) << 24; report("writeable xapic id", !test_for_exception(GP_VECTOR, do_write_apic_id, &newid) && - id + 1 == apic_id()); + (id == apic_id() || id + 1 == apic_id())); if (!enable_x2apic()) goto out;